Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
1998-12-01
2001-12-11
Cuneo, Kamand (Department: 2841)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S050510, C438S112000, C438S458000, C438S464000
Reexamination Certificate
active
06329606
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to grid array semiconductor packages, including integrated circuit chips or dies, produced from an assembly of packages formed together in an elongated, connected strip using standard packaging equipment, with a maximized yield, and at a low cost.
2. Related Art
As integrated circuits have become more complex, a need has arisen for a packaged integrated circuit having a large number of high density, reliable external package connections. It is also desirable to include in a packaged integrated circuit one or more conductive layers for signal routing and provision for ground and power metallization traces. To meet these needs, the ball grid array has been developed as illustrated in FIG. 1 of the related application Ser. No. 08/214,339, now U.S. Pat. No. 5,635,671.
A typical ball grid array includes a semiconductor die, sometimes called herein an integrated circuit (IC) or chip, attached to a die attach surface on a printed circuit board (PCB) with adhesive. Electrically conductive bond pads on the die are connected by electrically conductive bond wires to electrically conductive traces and/or electrically conductive regions formed on or adjacent to the die attach surface of the substrate. Electrically conductive vias are formed through the substrate from the traces and/or regions on the die attach surface to a mounting surface of the substrate opposite the die attach surface. The electrically conductive traces formed on the mounting surface extend to solder pads formed on the mounting surface. Solder bumps are formed on each of the solder pads. The solder bumps are reflowed to attach the substrate to a larger mother board. An encapsulant such as plastic is formed to enclose the semiconductor die, the bond wires and a portion of the die attach surface of the substrate including most of the traces and/or regions. The vias are shown outside the encapsulant but can be inside the encapsulant. The encapsulant is frequently formed by injection or transfer molding or by conventional molding equipment to form the encapsulant over the die in a ball grid array. Liquid (glob top) encapsulant also can be used.
Recent related art is seen in the illustration of a wire bond TBGA (Tape Ball Grid Array) 1-Metal Microflex Circuit published by the Electronic Product Division of 3M where an IC chip is adhered to a stiffener/heatsink with a polyimide tape first surface containing metallization, wire bonded to the chip and providing conductive vias, outside of a central encapsulant over the chip and bond wires, to solder balls on an opposite surface of the tape.
Currently, molded plastic BGAs are assembled using a printed circuit board (PCB) strip containing multiple BGA (ball grid array) circuits that is rectangular in shape. A single unit BGA image is successively replicated on the PCB strip in order to maximize productivity during assembly. In this way, several BGAs are processed at the same time in many of the assembly processes. The PCB strip format also helps to reduce material handling expense in other areas of the assembly process that operate on only one site at a time.
One of the problems with procuring PCBs in strip form that have successively replicated BGA images is that the PCB vendor needs to provide 100% good units on the PCB strip so that the assembly facility does not process “bad” units. If the vendor or in-house manufacturing operation fabricates BGAs in strip form and includes a bad BGA image, all of the remaining good BGA images on the strip have to be thrown away. If the BGA assembly facility accepts bad BGA images on each strip, then the throughput of certain assembly processes is reduced because “bad” units are being processed. Also, the cost of the PCBs increases if the vendor cannot ship PCB strips that contain bad units.
An obvious method of using only “good” units in the BGA assembly process is to have the PCB vendor supply all good PCBs in single unit format instead of in a strip format. The problem with processing singles in the BGA assembly process is that almost all of the off the shelf assembly equipment used by industry today is configured to run PCBs in the strip format. The other drawback of processing single unit PCBs is that the resultant throughput of many of the assembly processes is reduced as compared to throughput in PCB strip processing.
In the manufacture of related art devices by molding operations, it is well recognized that during encapsulation and subsequent removal of a molding die section, the package encapsulant not only encloses the die and die bonds but also extends along the surface of the die-mounting substrate where a mold runner is located leading to a molten encapsulant supply pot. The excess encapsulant sometimes called “flash” or “bleed”, i.e., encapsulant other than that necessary to enclose the die and die bonds, must then be removed. However, when the excess encapsulant is peeled away from the substrate surface, the encapsulant adheres to the substrate surface, twisting the substrate and tearing or rupturing the substrate surface, thereby causing damage to the packaged device. This damage can be cosmetic (e.g. marring of the substrate surface) and/or functional (e.g. fracturing of the substrate; destruction of the electrically conductive traces on the substrate surface; tearing away of the solder mask on the substrate surface to undesirably expose, for instance, copper, and/or weakening or breaking of the seal between the encapsulant and the substrate surface).
Further, in production, it is desirable to integrally form a plurality of substrates in a strip having alignment holes that are located so as to be captured by tooling pins of a fixture, allowing the packaging process (including encapsulation) to be automated. The excess encapsulant must be removed from the strip prior to further processing since, if left attached to the strip, the excess encapsulant extends past the edge of the strip prohibiting automated handling in subsequent processes. Adherence of the excess encapsulant to the substrate during removal of the excess encapsulant may cause torquing of the strip that distorts the strip and renders the strip unusable for further processing. In the first related application, a novel degating region with noble metal plating is formed at each runner or gate location such that the molding compound (encapsulant) bonds weakly with the plated runner area on the PCB substrate allowing removal of excess encapsulant without damaging the remainder of the package assembly.
A plurality of individual grid array semiconductor packages are singulated from an assembly of packages fabricated together in the form of an elongated, connected strip using standard packaging equipment, with a maximized yield, and at a low cost. The strip assembly comprises a series of pre-tested and pre-accepted printed circuit boards mounted seriatim in apertures extending longitudinally along an elongated carrier strip. The circuit boards may comprise a semi-flexible plastic, e.g., an epoxy, and the carrier strip may comprise a metal, e.g., copper or steel.
Each of the circuit boards has an outer peripheral edge connected with an adhesive tape to an inner peripheral edge of a portion of the carrier strip bounding the apertures therein. An integrated circuit die is attached to each of the circuit boards. Each die has conductive pads that are wire bonded to bonding pads on a first surface of a corresponding one of the circuit boards. An encapsulant is molded over each die, corresponding wire bonds, and onto a portion of the first surface of the corresponding circuit board to form a protective body thereon.
Each of the circuit boards in the strip assembly includes an array of contact pads on an opposite second surface thereof, and conductive vias that extend from the contact pads to a metallization on the respective first surface thereof. A solder ball may extend from each of the contact pads to function as an input-output terminal.
When processing of the strip assembly is complete, the indivi
Briar John
Freyman Bruce J.
Maxcy Jack C.
Amkor Technology Inc.
Cuneo Kamand
Lawrence Don C.
Skjerven Morrill & MacPherson LLP
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