Graphics processor for stereoscopically displaying a...

Computer graphics processing and selective visual display system – Computer graphic processing system – Plural graphics processors

Reexamination Certificate

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C345S611000, C345S674000, C345S419000

Reexamination Certificate

active

06674440

ABSTRACT:

FIELD OF THE INVENTION
The invention generally relates to computer systems and, more particularly, the invention relates to processing graphics request data for stereoscopic display on a computer display device.
BACKGROUND OF THE INVENTION
Images may be stereoscopically drawn on a display device in accord with many well known techniques. Among those techniques is one in which a first set of (horizontal) lines on the display is directed to a viewer's right eye, while a second set of different lines on the display is directed the viewer's left eye. For example, every odd line may be directed to the viewer's left eye only, while every even line may be directed to the viewer's right eye only. To stereoscopically view an image utilizing this technique, the viewer generally must wear a pair of polarized glasses that blocks the first set of lines from view by the left eye, and similarly blocks the second set of lines from view by the right eye. The combined effect viewed by both eyes produces the stereoscopic image.
As is known in the art, many conventionally known computer graphical application program interfaces, such as the OPENGL™ API (available from Silicon Graphics, Inc. of Mountain View, Calif.), break an image into a plurality of primitive shapes (“primitives”), such as lines and points, to display the image. Each primitive of the image is rendered to produce the final displayed image. Display problems a rise, however, when primitives are stereoscopically drawn across a small, odd number of lines of the display device. For example, only one eye of a viewer will see a horizontal line (i.e., drawn on one line of the display device), while the other eye will not see such line. This distorts the ultimate stereoscopic image, thus degrading the visual effect of the display.
In a similar manner, because of commonly known aliasing problems, a line drawn at less than or equal to a forty-five degree angle from the horizontal of a display device also is distorted. As shown in
FIG. 1
, such a line often lights several consecutive pixels in each of several lines to create a stair effect. Each eye thus sees every other part of the line, effectively creating the illusion of a discontinuous line.
SUMMARY OF THE INVENTION
In accordance with one aspect of the invention, a method, computer program product, and graphics processor for stereoscopically displaying a primitive on a display device adds a row of pixels to the primitive to improve its appearance on the display device. To that end, it first is determined if the primitive is to be stereoscopically displayed on the display device. After it is determined that the primitive is to be stereoscopically displayed, then a row of pixels is added to the primitive. The primitive preferably is a point primitive or a line primitive.
In accordance with another aspect of the invention, a method and apparatus improves the appearance of a graphical image for subsequent display on a display device. The graphical image is comprised of a plurality of primitives that each have an associated width. Accordingly, graphics request code representing the plurality of primitives;is received. It then is determined if the plurality of primitives are to be displayed in a stereoscopic display mode. If the plurality of primitives is determined to be in the stereoscopic display mode, then the width is increased, by one pixel, of a set of the plurality of primitives.


REFERENCES:
patent: 4434437 (1984-02-01), Strolle et al.
patent: 4615013 (1986-09-01), Yan et al.
patent: 4646232 (1987-02-01), Chang et al.
patent: 4833462 (1989-05-01), Gover et al.
patent: 4908780 (1990-03-01), Priem et al.
patent: 4918626 (1990-04-01), Watkins et al.
patent: 4991122 (1991-02-01), Sanders
patent: 5083217 (1992-01-01), Kumamoto
patent: 5107415 (1992-04-01), Sato et al.
patent: 5123085 (1992-06-01), Wells et al.
patent: 5239654 (1993-08-01), Ing-Simmons et al.
patent: 5287438 (1994-02-01), Kelleher
patent: 5293480 (1994-03-01), Miller et al.
patent: 5313551 (1994-05-01), Labrousse et al.
patent: 5363475 (1994-11-01), Baker et al.
patent: 5371840 (1994-12-01), Fischer et al.
patent: 5394524 (1995-02-01), DiNicola et al.
patent: 5398328 (1995-03-01), Weber et al.
patent: 5410331 (1995-04-01), Schuneman
patent: 5446479 (1995-08-01), Thompson et al.
patent: 5485559 (1996-01-01), Sakaibara et al.
patent: 5511165 (1996-04-01), Brady et al.
patent: 5519823 (1996-05-01), Barkans
patent: 5544294 (1996-08-01), Cho et al.
patent: 5555359 (1996-09-01), Choi et al.
patent: 5557734 (1996-09-01), Wilson
patent: 5561749 (1996-10-01), Schroeder
patent: 5572713 (1996-11-01), Weber et al.
patent: 5629720 (1997-05-01), Cherry et al.
patent: 5631693 (1997-05-01), Wunderlich et al.
patent: 5651107 (1997-07-01), Frank et al.
patent: 5664114 (1997-09-01), Krech, Jr. et al.
patent: 5666520 (1997-09-01), Fujita et al.
patent: 5684939 (1997-11-01), Foran et al.
patent: 5701365 (1997-12-01), Harrington et al.
patent: 5706481 (1998-01-01), Hannah et al.
patent: 5721812 (1998-02-01), Mochizuki
patent: 5737455 (1998-04-01), Harrington et al.
patent: 5757375 (1998-05-01), Kawase
patent: 5757385 (1998-05-01), Narayanaswami et al.
patent: 5764237 (1998-06-01), Kaneko
patent: 5821950 (1998-10-01), Rentschler et al.
patent: 5841444 (1998-11-01), Mun et al.
patent: 5870567 (1999-02-01), Hausauer et al.
patent: 5883641 (1999-03-01), Krech, Jr. et al.
patent: 5886701 (1999-03-01), Chauvin et al.
patent: 5914711 (1999-06-01), Mangerson et al.
patent: 5982375 (1999-11-01), Nelson et al.
patent: 6091419 (2000-07-01), Kim
patent: 6108005 (2000-08-01), Starks et al.
patent: 6295070 (2001-09-01), Wood
patent: 0 311 798 (1989-04-01), None
patent: 0 397 180 (1990-11-01), None
patent: 406 084 (1991-02-01), None
patent: 0 438 194 (1991-07-01), None
patent: 0 448 286 (1991-09-01), None
patent: 0 463 700 (1992-01-01), None
patent: 0 566 229 (1993-10-01), None
patent: 0 627 682 (1994-12-01), None
patent: 0 631 252 (1994-12-01), None
patent: 0 693 737 (1996-01-01), None
patent: 0 734 008 (1996-09-01), None
patent: 0 735 463 (1996-10-01), None
patent: 0 810 553 (1997-12-01), None
patent: 0 817 009 (1998-01-01), None
patent: 0 825 550 (1998-02-01), None
patent: 0 840 279 (1998-05-01), None
patent: 7021406 (1995-01-01), None
patent: WO 86/07646 (1986-12-01), None
patent: WO 92/00570 (1992-01-01), None
patent: WO 93/06553 (1993-04-01), None
patent: WO 96/41311 (1996-12-01), None
patent: WO 97/21192 (1997-06-01), None
“A Fine Grained Data Flow Machine and Its Concurrent Execution Mechanism,” Iwashita et al., C&C Information Technology Research Labs, Apr. 1989, pp. 63-72.
“A Dataflow Image Processing System TIP-4,” Fujita et al., C&C Information Technology Research Labs, NEC Corporation, Sep. 1989, pp. 735-741.
“Processing the New World of Interactive Media,” Rathman, The Trimedia VLIW CPU Architecture, Mar. 1998, pp. 108-117.
“Effective Cache Mechanism for Texture Mapping,” IBM Technical Disclosure Bulletin, vol. 39, No. 12, Dec. 1996, pp. 213-217.
“Advanced Raster Graphics Architecture,” XP-002118066, pp. 890-893.
“Data-Format Conversion: Intel/Non-Intel,” vol. 33, No. 1A, Jun. 1990, IBM Technical Disclosure Bulletin, pp. 420-427.
“Address Munging Support in a Memory Controller/PCI Host Bridge for the PowerPC 603 CPU Operating in 32-Bit Data Mode,” IBM Technical Disclosure Bulletin, vol. 38, No. 09, Sep. 1995, pp. 237-240.
“One Frame Ahead: Frame Buffer Management for Animation and Real-Time Graphics,” XP-000749898, Auel et al., Tektronix Inc., pp. 43-50.
“Efficient Alias-Free Rendering Using Bit-Masks and Look-Up Tables,” Abram et al., The University of North Carolina at Chapel Hill, XP-002115680, Jul. 1985, pp. 53-59.
“A New Simple and Efficient Antialiasing with Subpixel Masks,” Schlling et al., Computer Graphics, vol. 25, No. 4, Jul. 1991, pp. 133-141.
“A Multiprocessor System Utilizing Enhanced DSP's for Image Progressing,” Ueda et al., XP 2028756, pp. 611-619.
“The Reyes Image Rendering Architecture,” Cook et al., Computer Graphics, vol. 21, No. 4, Jul. 1987, pp. 95-102.
“The Accumulation Buffer: Hardware Support

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