Computer graphics processing and selective visual display system – Computer graphic processing system – Interface
Reexamination Certificate
1999-07-15
2001-01-30
Tung, Kee M. (Department: 2776)
Computer graphics processing and selective visual display system
Computer graphic processing system
Interface
C345S522000, C345S182000
Reexamination Certificate
active
06181355
ABSTRACT:
FIELD OF THE INVENTION
The invention generally relates to computer systems and, more particularly, the invention relates to processing graphics request data for display on a computer display device.
BACKGROUND OF THE INVENTION
Three dimensional graphics request data commonly is processed in a computer system as a plurality of polygons having vertices. Each of the vertices have associated attribute data (e.g., color, transparency, depth, etc . . . ) that is utilized to rasterize pixels on a computer display device.
Vertices commonly are subjected to a plurality of different types of geometry calculations prior to being rasterized. Common functions typically include addition and multiplication functions. Specialized geometry accelerators often are utilized to perform such functions. Additionally, some transcendental functions commonly are required in vertex processing. Such calculations, for example, may be to determine an inverse square root of a number, or 2 raised to a power. Many geometry accelerators include a lookup table for each transcendental or elementary used function. Each lookup table typically has accompanying interpolation hardware for enhancing the accuracy of the transcendental functions by interpolating the results of the lookup table.
SUMMARY OF THE INVENTION
In accordance with one aspect of the invention, a graphics processor for processing vertices of a polygon includes an input for receiving an instruction for a processing step, memory for storing a first lookup table and a second lookup table, and an interpolation engine that, responsive to receipt of the instruction from the input, selects one of the lookup tables, determines table output from the one of the lookup tables, and produces an output value based upon the table output and data relating to the given vertex. In preferred embodiments, each of the first and second lookup tables corresponds to a selected function and contains table output as a function of an input value. The input value corresponds to data relating to the given vertex.
In other embodiments, the graphics processor also includes a multiplexer for enabling the interpolation engine to couple to either of the first and second lookup tables. The graphics processor also may have a plurality of additional lookup tables, where the interpolation engine is selectively coupled with any of the first, second or additional lookup tables.
In accordance with other aspects of the invention, an apparatus for processing computer graphics requests includes a graphics request input, and a processor coupled to the graphics request input. The processor is responsive to instructions and has an output. Among other things, the processor preferably includes a transcendental function generator with a plurality of lookup tables, and an interpolator engine selectably coupled to one of the plurality of lookup tables. Each table preferably corresponds to a particular transcendental function and contains interpolation coefficients.
In preferred embodiments, the apparatus includes a multiplexer for enabling the interpolator engine to selectively couple to any one of the plurality of lookup tables.
REFERENCES:
patent: 4434437 (1984-02-01), Strolle et al.
patent: 4615013 (1986-09-01), Yan et al.
patent: 4646232 (1987-02-01), Chang et al.
patent: 4908780 (1990-03-01), Priem et al.
patent: 4918626 (1990-04-01), Watkins et al.
patent: 4991122 (1991-02-01), Sanders
patent: 5107415 (1992-04-01), Sato et al.
patent: 5123085 (1992-06-01), Wells et al.
patent: 5224064 (1993-06-01), Henry et al.
patent: 5239654 (1993-08-01), Ing-Simmons et al.
patent: 5287438 (1994-02-01), Kelleher
patent: 5293480 (1994-03-01), Miller et al.
patent: 5313551 (1994-05-01), Labrousse et al.
patent: 5363475 (1994-11-01), Baker et al.
patent: 5371840 (1994-12-01), Fischer et al.
patent: 5394524 (1995-02-01), DiNicola et al.
patent: 5398328 (1995-03-01), Weber et al.
patent: 5412491 (1995-05-01), Bachar
patent: 5446479 (1995-08-01), Thompson et al.
patent: 5485559 (1996-01-01), Sakaibara et al.
patent: 5511165 (1996-04-01), Brady et al.
patent: 5519823 (1996-05-01), Barkans
patent: 5544294 (1996-08-01), Cho et al.
patent: 5555359 (1996-09-01), Choi et al.
patent: 5557734 (1996-09-01), Wilson
patent: 5561749 (1996-10-01), Schroeder
patent: 5572713 (1996-11-01), Weber et al.
patent: 5631693 (1997-05-01), Wunderlich et al.
patent: 5664114 (1997-09-01), Krech, Jr. et al.
patent: 5666520 (1997-09-01), Fujita et al.
patent: 5684939 (1997-11-01), Foran et al.
patent: 5701365 (1997-12-01), Harrington et al.
patent: 5706481 (1998-01-01), Hannah et al.
patent: 5721812 (1998-02-01), Mochizuki
patent: 5737455 (1998-04-01), Harrington et al.
patent: 5757375 (1998-05-01), Kawase
patent: 5757385 (1998-05-01), Narayanaswami et al.
patent: 5764237 (1998-06-01), Kaneko
patent: 5821950 (1998-10-01), Rentschler et al.
patent: 5841444 (1998-11-01), Mun et al.
patent: 5870567 (1999-02-01), Hausauer et al.
patent: 5883641 (1999-03-01), Krech, Jr. et al.
patent: 5914711 (1999-06-01), Mangerson et al.
patent: 5956047 (1999-09-01), Krech, Jr. et al.
patent: 0 311 798 A2 (1989-04-01), None
patent: 0 397 180 A2 (1990-11-01), None
patent: 0 438 194 A2 (1991-07-01), None
patent: 0 448 286 A2 (1991-09-01), None
patent: 0 463 700 A2 (1992-01-01), None
patent: 0 566 229 A2 (1993-10-01), None
patent: 0 631 252 A2 (1994-12-01), None
patent: 0 627 682 A1 (1994-12-01), None
patent: 0637813 (1995-02-01), None
patent: 0 693 737 A2 (1996-01-01), None
patent: 0 734 008 A1 (1996-09-01), None
patent: 0 735 463 A2 (1996-10-01), None
patent: 0 810 553 A2 (1997-12-01), None
patent: 0 817 009 A2 (1998-01-01), None
patent: 0 825 550 A2 (1998-02-01), None
patent: 0 840 279 A2 (1998-05-01), None
patent: WO 86/07646 (1986-12-01), None
patent: WO 92/00570 (1992-01-01), None
patent: WO 93/06553 (1993-04-01), None
patent: WO 97/21192 (1997-06-01), None
Iwashita, et al., “A Fine Grained Data Flow Machine and Its Concurrent Execution Mechanism” NEC Reg. & Develop., No. 93, Apr. 1989, pp. 63-72.
Fujita, et al., “A Dataflow Image Processing System TIP-4”, Proceedings of the 5th International Conference on Image Analysis and Processing, pp. 735-741.
Rathman, et al., “Processing the New World of Interactive Media”, IEEE Signal Processing Magazine 1053-5888/98/510.00 Copyright Mar. 1998, vol. 15, No. 2, XP-002121705, pp. 108-117.
IBM Technical Disclosure Bulletin “Effective Cache Mechanism for Texture Mapping” vol. 39, No. 12, Dec. 1996, XP-002065152, pp. 213, 215 and 217.
“Advanced Raster Graphics Architecture” XP-002118066, pp. 890-893.
IBM Technical Disclosure Bulletin “Data Format Conversion: Intel/Non-Intel”, vol. 33, No. 1A, Jun. 1990, XP-000117784, pp. 420-427.
IBM Technical Disclosure Bulletin “Address Munging Support in a Memory Controller/PCI Host Bridge for the PowerPC 603 CPU Operating in 32-Bit Data Mode” vol. 38, No. 09, Sep. 1995, XP-000540250, pp. 237-240.
Auel, K., “One frame ahead: frame buffer management for animation and real-time graphics”, Presented at Computer Graphics: Online Publications, Pinner, Middlesex, UK, 1988, XP-000749898, pp. 43-50.
Abram, et al., “Efficient Alias-free Rendering using Bit-masks and Look-up Tables”, San Francisco, Jul. 22-26, vol. 19, No. 13, 1985, XP-002115680, pp. 53-59.
Schilling, A., “A New and Efficient Antialiasing with Subpixel Masks” XP-000562430, pp. 133-141.
Ueda, H., et al., “A Multiprocessor System Utilizing Enhanced DSP's For Image Processing”, Central Research Laboratory, Hitachi, Ltd., 1988 IEEE, XP-2028756, pp. 611-620.
Cook, R.L., et al., “The Reyes Image Rendering Architecture”, Computer Graphics, vol. 21, No. 4, Jul. 1987, XP-000561437, pp. 95-102.
Haeberli, P., et al., “The Accumulation Buffer: Hardware Support for High-Quality Rendering”, Computer Graphics, vol. 24, No. 4, Aug. 1990, XP-000604382, pp. 309-318.
Watt, A., et al., “Advanced Animation and Rendering Techniques Theory and Practice”, ACM Press, NY, pp. 127-137.
Carpenter, L., “The A-buffer, an Antialiased Hidden Surface Method”, Computer Graphics, vol. 18, No. 3, Jul. 1984, pp. 13-18.
Brethour Vernon
Moore Stacy
3DLabs Inc. Ltd.
Formby Betty
Groover Robert
Groover & Associates
Tung Kee M.
LandOfFree
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