Computer graphics processing and selective visual display system – Computer graphics processing – Graphic manipulation
Reexamination Certificate
2001-05-18
2004-03-09
Tung, Kee M. (Department: 2676)
Computer graphics processing and selective visual display system
Computer graphics processing
Graphic manipulation
C345S614000, C345S545000
Reexamination Certificate
active
06704026
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to the field of computer graphics systems. More particularly, the present invention relates to rasterization of geometric primitives within computer graphics systems.
2. Description of the Related Art
Successive generations of graphics systems have exhibited increasing performance as a result of ever increasing clock speeds and higher levels of integration. The employment of smaller device geometries and higher clock frequencies have led to significant improvements in the rendering engines of these graphics systems making possible a new host of graphics applications.
However, the continued demand for images of higher quality and faster refresh rates from new applications such as three-dimensional (3D) modeling, virtual reality, and 3D computer games places a steadily increasing burden on graphics systems. Thus designers strive to improve performance throughout the entire graphics system pipeline to try and meet the performance needs of these new applications. Memory systems in general continue to provide design challenges, with the limitations of memory devices defining an upper limit of achievable system performance.
Interleaving is a common design technique employed to overcome the limitations of memory devices. An interleaved memory allows for the storage and retrieval of tiles or arrays of data. The memory is segmented into banks or interleaves, with each bank or interleave receiving a single element of the tile or array. In a high performance graphics system for example, each element may represent a pixel or fragment and a tile may represent a neighborhood of contiguous pixels or fragments. The interleaved system allows for complete tiles to be stored or retrieved in a single memory operation yielding a potential data rate increase of n:1 where n is the number of fragments in a tile.
In order for the graphics system to take advantage of the increased data rate provided by an interleaved memory, the render pipeline should supply a consistent stream of full tiles. Passing partially filled tiles to the memory for storage is likely to degrade the overall system performance. The burden therefore is shifted to the render pipeline to perform pixel-packing functions that may potentially reduce the number of partial tiles sent to the memory while maintaining the spatial interrelationships of the pixel data. For these reasons, a system and method for merging fragments prior to storage is desired.
SUMMARY OF THE INVENTION
The problems set forth above may at least in part be solved in some embodiments by a system or method for combining subsequent tiles of fragments (i.e., pixel data). In one embodiment, the system may include a fragment generator configured to generate tiles of fragments. A merge unit may be connected to the fragment generator and configured to receive the tiles of fragments. The merge unit may be further configured to test subsequent tiles of fragments against a fixed set of rules of combination. The merge unit may be further configured to produce a merged tile of fragments according to the outcome of the test. In some embodiments, some tiles may be deemed ineligible for merging by the merge unit and may receive no processing from the merge unit. A memory may be connected to the merge unit and may be configured to store the merged tiles of fragments. In some embodiments, the memory may be interleaved, and each fragment location in the tiles of fragments may be targeted to a specific interleave.
As noted above, a method for combining subsequent tiles of fragments is also contemplated. In one embodiment, the method may include examining two subsequent tiles of fragments and abandoning the merge operation if the intersection of the two tiles of fragments does not represent an empty set. In some embodiments, the two subsequent tiles of fragments to be merged may be tested against a fixed set of rules of combination. These rules of combination may disqualify certain tiles from the merge process based on the ratio of valid fragments to empty fragments in the tiles. In other embodiments, the rules of combination may further disqualify tiles of fragments from the merge process based on the spatial distribution of valid fragments within the tiles.
In one embodiment, the system for combining subsequent tiles of fragments may be integrated into a graphics system suitable for creating and displaying graphic images. In other embodiments, the system may be part of a separate assembly, communicating with a host graphics system through the use of a data or control bus specific to the host.
REFERENCES:
patent: 5854631 (1998-12-01), Akeley et al.
patent: 5859651 (1999-01-01), Potu
patent: 5990904 (1999-11-01), Griffin
patent: 6188394 (2001-02-01), Morein et al.
patent: 6429876 (2002-08-01), Morein
Kubalska Ewa M.
Kurihara Steven M.
Hood Jeffrey C.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Tung Kee M.
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