Graphics display architecture and control chip set thereof

Computer graphics processing and selective visual display system – Computer graphic processing system – Interface

Reexamination Certificate

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Details

C345S501000, C345S502000

Reexamination Certificate

active

07095415

ABSTRACT:
The graphics display architecture provided by the present invention comprises an AGP slot, a PCIE slot, and a control chip set. The control chip set comprises a plurality of multi-defined pins, which are electrically coupled to the first pins of the AGP slot and the second pins of the PCIE slot simultaneously. When the first graphics adapter is plugged in the AGP slot and the first graphics adapter complies with AGP interface specification, the multi-defined pins serve to send/receive the signal complied with AGP interface specification. When the first graphics adapter is plugged in the AGP slot and the first graphics adapter complies with the Gfx interface, the multi-defined pins serve to send/receive the signal complied with the Gfx interface. When the second graphics adapter is plugged in the PCIE slot, the multi-defined pins serve to send/receive the signal complied wit the PCIE interface specification.

REFERENCES:
patent: 6678780 (2004-01-01), Caruk et al.
patent: 6724389 (2004-04-01), Wilen et al.
patent: 6832269 (2004-12-01), Huang et al.
patent: 6874042 (2005-03-01), Sauber
“LVDS,” http://www.webopedia.com/TERM/L/LVDS.html.
“DVI,” http://www.webopedia.com/TERM/D/DVI.html.
“Multiplexer,” http://en.wikipedia.org/wiki/Multiplexer.

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