Computer graphics processing and selective visual display system – Display driving control circuitry – Controlling the condition of display elements
Patent
1996-08-15
1999-08-17
Grant, Chris
Computer graphics processing and selective visual display system
Display driving control circuitry
Controlling the condition of display elements
348 10, 348384, 455 62, H04N 716
Patent
active
059400722
ABSTRACT:
A graphics data decompression arrangement in a TV set top box that includes a system ROM for storing graphics data broken down into tiles, each of which is identified by a unique index number. The index numbers that identify the tiles of graphics data required to be included in a current picture on a TV set screen are written into a DRAM. An MPEG decoder reads the index numbers to convert them into a graphics address signal supplied via a ROM address bus to the system ROM to indicate the addresses of the required tiles of graphics data. In response, the required tiles are fed to the MPEG decoder for decompression in accordance with an MPEG decompression algorithm. A time-division multiplexing scheme allows the ROM address bus to be used for transmitting to the system ROM an address signal from a CPU that indicates where information required for CPU operations is located in the system ROM. In response to the CPU address signal, the required information is fed to the CPU.
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Blonstein Steve
Jahanghir Musa
Jahangiri Ikram
Jeck Steve
Grant Chris
Samsung Information Systems America
Sherman, Esq Kenneth L.
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