Computer graphics processing and selective visual display system – Computer graphic processing system – Plural graphics processors
Reexamination Certificate
2005-03-08
2005-03-08
Chauhan, Ulka J. (Department: 2676)
Computer graphics processing and selective visual display system
Computer graphic processing system
Plural graphics processors
C345S506000, C345S520000, C345S582000
Reexamination Certificate
active
06864892
ABSTRACT:
A system and method for preserving the order of data items through a divergence-and-reconvergence of two or more paths in a hardware device. A host processor may write a first token to a first path in the hardware device. A convergence unit in the hardware device may receive and store the first token in a synchronization register. The host processor may poll the synchronization register to determine when the first token arrives in the synchronization register. In response to determining that the first token has arrived in the synchronization register, the host processor may safely write a sequence of one or more data items to a second path in the hardware device.
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Bowman Thomas W.
Emberling Brian D.
Kehlet David C.
Lavelle Michael G.
Brightwell Mark K.
Chauhan Ulka J.
Hood Jeffrey C.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Sun Microsystems Inc.
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