Graphics address remapping table entry feature flags for customi

Details Graphics address remapping table entry feature flags for customi Graphics address remapping table entry feature flags for customi

1997-09-09

1999-12-07

Tung, Kee M.

Computer graphics processing and selective visual display system

Computer graphic processing system

Interface

345509, 345514, 345520, 345515, 710126, 710128, 711206, G06F 1516

Patent

active

059991984

ABSTRACT:
A computer system having a core logic chipset that functions as a bridge between an Accelerated Graphics Port ("AGP") bus device such as a graphics controller, and a host processor and computer system memory wherein a Graphics Address Remapping Table ("GART table") is used by the core logic chipset to remap virtual memory addresses used by the AGP graphics controller into physical memory addresses that reside in the computer system memory. The GART table enables the AGP graphics controller to work in contiguous virtual memory address space, but actually use non-contiguous blocks or pages of physical system memory to store textures, command lists and the like. The GART table is made up of a plurality of entries, each entry comprising an address pointer to a base address of a memory page, and feature flags that may be used to customize the associated memory page.

REFERENCES:
patent: 5812789 (1998-09-01), Diaz et al.
patent: 5835962 (1998-11-01), Chang et al.
patent: 5857086 (1999-01-01), Horan et al.

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