Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Patent
1998-01-15
2000-01-18
Hjerpe, Richard A.
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
345 83, 345147, G09G 332, G09G 510
Patent
active
060161329
ABSTRACT:
A gradation controlled LED display device has an LED array having a matrix of LED chips. The lighting time of each of the LED chips is controlled to display one of gradation levels. The display device has a gradation control circuit, linearity adjusting circuits, and a base-resistance selector that are connected to data lines, which are connected to the LED chips. The gradation control circuit controls the lighting time of each LED chip according to 8-bit display data, to display one of 255 gradation levels. The linearity adjusting circuit determines whether or not five upper bits of given 8-bit display data are all "zero" and provides a resultant signal. If the resultant signal indicates that the five upper bits are all "zero", the base-resistance selector selects a large base resistance value, and if any one of the five upper bits is "1", a small base resistance value. In this way, a base resistance value applied to the base of a pnp transistor of a data driver for driving one data line is selected between the large and small values, to sharply turn on and off the pnp transistor at low gradation levels. This arrangement clearly distinguishes the lighting times of low gradation levels from one another and improves the contrast of low gradation levels.
REFERENCES:
patent: 5638091 (1997-06-01), Sarrasin
patent: 5708452 (1998-01-01), Takahashi
patent: 5717417 (1998-02-01), Takahashi
Dinh Duc
Hjerpe Richard A.
Kabushiki Kaisha Toshiba
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