GPS receiver having DR sensor signal sampling function

Data processing: vehicles – navigation – and relative location – Navigation – Employing position determining equipment

Reexamination Certificate

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Details

C701S200000, C701S207000, C701S216000, C701S217000, C701S300000, C342S357490, C342S357490, C342S357490

Reexamination Certificate

active

06408244

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a GPS receiver used for a navigation system.
A car navigation system employs a GPS receiver, which has functions of receiving GPS signals, measuring a distance between a GPS satellite and the GPS receiver (i.e., a distance between a GPS satellite and a vehicle which is equipped with the car navigation system), and providing a GPS solution (a GPS position and/or a GPS velocity ).
Generally, in a predetermined cycle, the GPS receiver updates the GPS solution and outputs the GPS solution and data related to a GPS measurement as a GPS output message in the predetermined cycle to a host CPU (Central Processing Unit), which functions as a host to the GPS receiver in the car navigation system. The host CPU receives the GPS solution and the data related to the GPS measurement and performs various functions, which are required for a car navigation system, such as a dead-reckoning, a map-matching, a route searching, and the like. The data related to the GPS measurement includes, for example, error information included in the GPS solution. Typically, data transmission between the GPS receiver and the host CPU is carried out by serial data transmission.
In general, a GPS receiver is modularized as a component of a navigation system and is mounted in the navigation systems.
Recently, these functions are becoming more complicated. Therefore, a host CPU having higher performance is required to achieve these complicated functions.
Particularly in providing the dead-reckoning function, there are some problems as follows, because the host CPU is required to process a plurality of DR (dead-reckoning) sensor signals. First, in order to process a plurality of dead-reckoning sensor signals, the host CPU is required to include a plurality of interfaces through which the DR sensor signals are transmitted thereto. Second, it is necessary that the host CPU samples the DR sensor signals in a predetermined cycle. Sampling of the DR sensor signals in a predetermined cycle is a significant burden to the host CPU.
FIG. 1
is a flowchart showing a process in which the host CPU controls the interfaces thereof. In
FIG. 1
, the interfaces of the host CPU include an I/F
1
which is an interface to the GPS receiver, an I/F
2
which is an interface for receiving a signal from a gyro sensor, an I/F
3
which is an interface for receiving a back signal, an I/F
4
which is an interface for receiving a speed pulse signal, and an I/F
5
which is an interface to a speed pulse signal filter.
The back signal indicates whether the vehicle is going ahead or backward. The speed pulse signal is transmitted from a velocity sensor mounted on the vehicle and has a frequency corresponding to a velocity of the vehicle.
The signal from the gyro sensor is filtered and converted to a digital signal. Then, the converted digital signal is input to the I/F
2
of the host CPU. The speed pulse signal is filtered by the speed pulse signal filter and then input to a counter which counts the number of pulses of the speed pulse signal. The number counted by the counter is read by the host CPU via the I/F
4
. The speed pulse signal filter is a low pass filter of which a cut-off frequency is variable. The cut-off frequency of the speed pulse signal filter varies according to a control signal which is sent from the I/F
5
of the host CPU.
The process shown in
FIG. 1
is called and executed in the host CPU, for example, in a predetermined cycle, e.g., 1 second. In
FIG. 1
, S
401
and S
410
represent that the steps between S
401
and S
410
repeat 32 times. Every time the steps between S
401
and S
410
are processed, a variable i is incremented by one, and therefore the variable i is incremented from 0 up to 31. Only when the variable i=0 (S
402
: YES), the GPS output message is transmitted to the host CPU via the I/F
1
(S
403
). At step S
404
, the host CPU measures time using a timer which is provided in the host CPU to determine if {fraction (1/32)} second has passed. If {fraction (1/32)} second has passed (S
404
: YES), control proceeds to S
405
. When control proceeds to step S
405
, the host CPU restarts measuring time from 0 to determine {fraction (1/32)} second has passed.
A value of an output voltage of the gyro sensor is transmitted via the I/F
2
at S
405
, and a state of the back signal is transmitted via the I/F
3
at S
406
. Next, the number counted by the counter is transmitted via the I/F
4
at S
407
. At step S
408
, taking into account a frequency of the speed pulse signal, the host CPU generates the control signal to optimize the cut-off frequency of the speed pulse signal filter. At step S
409
, the control signal is transmitted from the I/F
5
of the host CPU to the speed pulse filter.
Accordingly, the host CPU obtains one GPS output message and obtains 32 pieces of data of the DR sensors in 1 second cycle.
As described above, to enhance the car navigation system, it is required to execute the sampling of DR sensor signals in a predetermined cycle, to measure time, and to manage a buffer in which the data of the DR sensors is stored. Sampling of DR sensors, measuring time and managing the buffer make the navigation application program in the car navigation program large. Further, a capacity of the host CPU's memory, which is required for the execution of the navigation application program, increases. That is, the host CPU used for the car navigation system must have high performance and also is designed specifically for car navigation use.
On the contrary, if a car navigation system is to be configured with a host CPU that is not specialized for car navigation use, a peripheral circuit for the host CPU should be made complex. In this case, manufacturing cost increases.
Otherwise, the number of DR sensors managed by the host CPU should be reduced. In this case, performance in estimating a location of the vehicle as a car navigation system reduces.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a navigation system which has high performance of estimating a location of a vehicle and which is configured with a host CPU that is not specialized for car navigation use.
Another object of the present invention is to provide a GPS receiver which has functions required for a car navigation system as well as the GPS measurement function so as to provide a host CPU with information which can reduce a load on the host CPU in a convenient form.
For the object, according to an aspect of the present invention, there is provided a navigation system, which is provided with a GPS receiver including a GPS measurement system that performs a GPS measurement to obtain a GPS solution, and a processor that estimates a location of a vehicle. The processor has an interface to said GPS receiver. The GPS receiver further includes at least one dead-reckoning sensor interface that receives at least one dead-reckoning sensor signal, a sampling system that samples the at least one dead-reckoning sensor signal received through the at least one dead-reckoning sensor interface to obtain first data, and an outputting system that outputs the GPS solution and the first data sampled by the sampling system. The processor receives the GPS solution and the first data through the interface. In this case, the processor performs a dead-reckoning using the first data to obtain a dead-reckoning solution and estimates the location of the vehicle based on the GPS solution and the dead-reckoning solution.
Since the GPS receiver can provide sampled data of the at least one dead-reckoning sensor signal for the processor, the processor can reduce a load of sampling of the at least one dead-reckoning sensor signal. In order to achieve high performance of estimating of the location of the vehicle, the processor is not required to include a plurality of interfaces through which the at least one dead-reckoning sensor signal is transmitted thereto.
Preferably, the at least one dead-reckoning sensor signal sampled by the sampling system may include at least one of an o

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