Patent
1995-06-07
1997-07-15
Harvey, Jack B.
395866, 395727, G06F 1322
Patent
active
056491239
ABSTRACT:
A GPIB system including a parallel poll detection system for capturing signals of a GPIB in response to a parallel poll command. Capture logic includes sampling circuitry for continually sampling the GPIB signals, where the capture logic further stores the samples into a buffer upon desired conditions. A parallel poll detection circuit detects a parallel poll command asserted and subsequently negated on the GPIB, and correspondingly causes GPIB samples to be captured on both of these events. Also, a timer circuit causes the GPIB signals to be captured a predeteremined time period after the assertion of each parallel poll command. In the preferred embodiment, transition detect logic further causes GPIB samples to be captured if any transition of GPIB data signals occur while the parallel poll command is asserted on the GPIB.
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1994 IEEE 488 and VXIbus Control, Data Acquisition, and Analysis, National Instruments Corporation, "GPIB Monitor/Analyzer, GPIB-410", 2-126 - 1-129, High Performance Single-Chip gPIB Talker/Listener ASIC, TNT4882, pp. 2-135 - 2-136 1994.
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Etienne Ario
Harvey Jack B.
Hood Jeffrey C.
National Instruments Corporation
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