GM-controlled current-isolated indirect-feedback...

Amplifiers – With semiconductor amplifying device – Including differential amplifier

Reexamination Certificate

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Details

C330S258000, C330S259000, C330S292000

Reexamination Certificate

active

06559720

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of current-isolated indirect-feedback instrumentation amplifiers.
2. Prior Art
Instrumentation amplifiers are considered closed loop gain blocks with high gain accuracy and excellent common mode rejection ratio (CMRR) performance. Non-sampled instrumentation amplifiers suitable for precision analog integrated circuits on silicon chips can be divided into two main categories.
1. Bridge type instrumentation amplifiers, and
2. Current isolation instrumentation amplifiers.
The bridge type instrumentation amplifier is the most widely used instrumentation amplifier, which is built around an opamp (operational amplifier) and four resistors in a bridge configuration. A typical bridge type instrumentation amplifier stage is shown in
FIG. 1
a
. As shown in
FIG. 1
b
, two non-inverting buffers with a few resistors often precede this stage for increased input impedance and gain variability using an external resistor. Nevertheless, the gain accuracy and common mode rejection ratio of such circuits are still very much dependant on the bridge section, sometimes called the difference amplifier.
Although bridge type instrumentation amplifiers are known for excellent linearity and gain accuracy, they often suffer from the degraded common mode rejection ratio at lower gains, besides the difficulty with lower rail sensing (depending on the opamp characteristics). For example, in
FIG. 1
b
the output of opamps of A
1
and A
2
cannot reach the GND, thereby prohibiting the rail sensing of the instrumentation amplifier. They also require large integrated circuit area (for incorporating accurate opamps) which makes them unsuitable for packaging in small commercial packages, such as an SOT23 package.
The common mode rejection ratio of bridge type instrumentation amplifiers is characterized by the following equation:
1/
CMRR
=1
/CMRR
opamp
+4&egr;/(1
+G
)
Were:
CMRR
opamp
is the CMRR of the operational buffer used to build the difference amplifier
&egr; is the resistor mismatch of the bridge
G is the open loop gain of the amplifier
From the above, it is quite evident that even with a perfect common mode rejection ratio for the opamp, the mismatch of the bridge, especially at lower gains, can degrade the overall common mode rejection ratio to poor values unfit for most applications. For example, with a 0.04% mismatch, the overall common mode rejection ratio can only reach 62 dB of rejection.
The second class of instrumentation amplifiers is based on the conversion of the input differential voltage to a current through a transconductance amplifier, and then the conversion of the current back to an output voltage in order to isolate the input stage and its common mode voltage from the rest of the circuitry (see FIG.
2
).
Indirect current feedback instrumentation amplifiers, as shown in
FIG. 3
, are based on the conversion of the input differential voltage V
IN
and a portion (V
FB
) of the output voltage V
OUT
(the voltage across resistor R
1
in the series combination of resistors R
1
and R
2
), to two differential currents by transconductance amplifiers GM
1
and GM
2
. These currents are then subtracted from each other and fed to a high gain transimpedance amplifier A at the output to close the loop.
A more detailed circuit for such an instrumentation amplifier is shown in FIG.
4
. Here, differential amplifiers GM
1
and GM
2
are comprised of transistors P
1
and P
2
and resistors R
11
and R
12
, and transistors P
3
and P
4
and resistors R
21
and R
22
, respectively, together with current sources I.
Differential transconductance amplifier GM
1
at the input and differential transconductance amplifier GM
2
at the output, together with the transimpedance loop amplifier A (for differential current to voltage conversion) comprise the indirect current feedback architecture.
For such a configuration, assuming a high gain for the loop amplifier A, the output currents of the two transconductance blocks algebraically sum to zero. Thus the gain equation is:
Gain=(
GM
1
/
GM
2
)(1
+R
2
/
R
1
)
One limitation of such an arrangement, which is somewhat inherent to the very fundamental operation of the differential pairs with relatively large signals at their inputs, is the change of transconductance GM as a function of the common mode of the differential inputs. In that regard, note in
FIG. 4
that the positive input of GM
2
is referenced to ground, or alternatively referenced to a reference voltage, while each of the differential inputs V
IN
of GM
1
is user controlled.
The transconductance of a differential pair can be defined as:
GM=∂I
od
/∂V
id
=f
(
V
id
, V
icm
, V
bd
, V
bcm
)
Where:
I
od
=differential output current of the differential pair
V
id
=input differential voltage
V
icm
=input common mode voltage
V
bd
=differential body voltage
V
bcm
=common mode body voltage
(see
FIGS. 5
a
and
5
b
)
The change in GM due to V
icm
is caused by the dependency of GM on V
ds
for a MOS transistor. For large common mode swings, the nonlinearity in GM can be high, which in turn can be translated into a gain error, especially when intrinsic gains of the input devices are low, as in the case of a MOS differential pair. (The intrinsic gain is the product of GM and r
o
, where r
o
is the output resistance of the transistor which is equal to the Early voltage (V
A
) divided by the drain current I
D
(r
o
=V
A
/I
D
). In
FIG. 4
, the differences in GM of the two differential pairs due to differences in the input common mode voltages of the two differential pairs will be such that the non-linearity of one pair is no longer canceled out by the non-linearity of the other pair. This gives rise to excessive non-linearity error.
Another limitation of the circuit in
FIG. 4
is its low common mode rejection ratio CMRR, especially for MOS input devices. It can be shown that for any differential stage, the overall CMRR can be approximated as:
1
/CMRR
=(1/&mgr;)(&Dgr;&mgr;/&mgr;)+(1
/CMRR
associated with the tail current source, here ignored)
Where:
1/&mgr;=1/((GM)(r
o
))=1/(average intrinsic gain of the input transistors), called the isolation factor
&Dgr;&mgr;/&mgr;=normalized difference between the intrinsic gains of input transistors, called the balancing factor
For bipolar devices having an isolation factor on the order of 1/&mgr;=1/1000 and a balancing factor of &Dgr;&mgr;/&mgr;=2/100, a common mode rejection ratio of 94 dB is achievable. However, in MOS devices of 1/&mgr;=1/50 and &Dgr;&mgr;/&mgr;=5/100, the common mode rejection ratio is 60 dB, or less if the isolation or balancing factors tend to have even more degraded values.
On the other hand, MOS devices at the input of instrumentation amplifiers have the benefit of very high input impedance, in addition to providing the luxury of controlling the GM of the input stage by yet another parameter (W/L of the MOS devices) in addition to the input tail current. Using such a MOS differential pair for GM
1
and GM
2
in
FIG. 4
results in lower overall common mode rejection ratio, and indirectly lower again accuracies through secondary effects of the input common mode voltage on GM.
Also known in the prior art is the constant GM bias circuit (
FIG. 6
) and the observation made by Roel Wassenaar. Roel Wassenaar made the observation that any differential pair with its transistors of the same length (L), same current density (I/W), where W is the width, and same type (bipolar or MOS of similar type) as the transistors in the bias circuit itself, and with the tail current of the differential pair fed from the bias circuit, will have the same GM as the bias circuitry itself.
Writing the translinear loop of V
GS
P1
, V
GS
P2
and R:
I
=
K
1

1
R
2



strong



inversion
I
=
K
2

1
R



weak



inversion
Where K
1
and K
2
are process, size (W/L) and

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