Globally planarized backend compatible thin film resistor...

Semiconductor device manufacturing: process – Making passive device – Resistor

Reexamination Certificate

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Details

C438S382000, C438S597000, C438S672000, C438S675000

Reexamination Certificate

active

06607962

ABSTRACT:

FIELD OF THE INVENTION
This invention relates generally to semiconductor processing, and in particular, to a method of forming a thin film resistor contact.
BACKGROUND OF THE INVENTION
Thin film resistors are employed in many integrated circuits. Thin film resistors are used in integrated circuits to implement the desired functionality of the circuit, including biasing of active devices, serving as voltage dividers, assisting in impedance matching, etc. They are typically formed by deposition of a resistive material on a dielectric layer, and subsequently patterned to a desired size and shape. Often, a thin film resistor is subjected to a heat treatment process (i.e. annealing) to improve its stability and to bring the resistance to a desired value.
Generally, after all the thin film resistors and other components of an integrated circuit are formed, a dielectric layer is deposited to insulate the resistors and other components from the interconnect wiring. This dielectric layer may be subjected to planarization by chemical-mechanical polishing (CMP) if reduced topography is desired before forming the interconnect wiring. Once the dielectric layer is formed, contacts are made through the layer to make electrical connections to thin film resistors and other components of the integrated circuit.
To minimize any perturbation to the thin film resistors, these contacts need to be etched with a process that is highly selective to the thin film resistor material. Under this requirement, an optimal wet etch process is more readily achievable than a dry etch process and hence preferred. Once the contact openings are made, a metal plug process could be used to establish the electrical contact between the thin film resistor and the subsequent interconnect wiring. The metal plug process could be done with deposition of a barrier metal stack followed by tungsten, aluminum, and/or copper deposition. In a planarized backend process where the dielectric above the thin film is polished to achieve flatness, the preferred method for the metal plug process further involves polishing or etch-back of the metal-plug material following its deposition.
A problem with forming contacts to thin film resistors arises from the fact that the dielectric above the thin film resistors has a thickness variation stemming from natural process and process equipment variations. If this dielectric is polished, as described above, this thickness variation is further exacerbated due to the additional variation produced by the polish process. Thus, the thin film resistors across a wafer or from wafer-to-wafer can be at different depths below the top surface of the dielectric layer.
Because of the different depths of the thin film resistors, the etching of the contact openings has to be conducted in a manner that guarantees contact opening to the deepest thin film resistor and/or component. As a consequence, the contact openings for shallower thin film resistors are overetched. As such, controlled dry etching may be more difficult to achieve since degradation and/or punch-through of the shallower thin film resistors is highly probable. In the case of wet etching, all thin film contacts are wider due to the isotropic nature of wet etching. Moreover, the shallower thin film resistor contacts would be further enlarged because of overetching. When metal plugs are used following the formation of wet-etched contacts, the wide contact openings lead to incomplete fill. Furthermore, when tungsten is used as the plug material, poor plug adhesion due to stress and excessive removal of the plug due to tungsten polish could result.
To circumvent the above problem, the dielectric below the thin film resistors could be planarized by chemical-mechanical polishing prior to depositing and patterning the thin film resistors. Consequently, topography created by other components of an integrated circuit are globally planarized. As the addition of thin film resistors typically adds little topography, this method obviates the need for planarization of the dielectric deposited above thin film resistors. But while it reduces the problem of dielectric non-uniformity above the thin film resistors, the increase in dielectric non-uniformity below the thin film resistors makes it difficult to employ laser-trimming of individual resistors when high precision resistance values are required. This is because the dielectric thickness below the thin film resistors modulates the laser irradiation requirements for trimming.
Thus, there is a need for a method of forming a thin film resistor contact which eliminates or reduces the drawbacks associated with the prior art method of forming thin film resistor contacts. Such a method and resulting contact is disclosed herein in accordance with the invention.
SUMMARY OF THE INVENTION
An aspect of the invention relates to a new and improved method of forming a thin film resistor contact. With this new and improved method, the above issues associated with dry or wet etching of the contact openings to thin film are eliminated. Also, with this new and improved method, the underlying thin film resistors are protected from the customary etching process used to make the contact openings. In summary, the new and improved method of forming a thin film resistor contact incorporates an etch-stop material to protect the underlying thin film resistor from a subsequent process of dry etching the contact opening to the thin film resistor. The dry etching of the contact openings allows more control over the size of the openings, which then makes metal plug processes more manufacturable and reliable.
More specifically, the method of forming a thin film resistor contact of the invention comprises the steps of forming a thin film resistor, forming a first dielectric layer over the thin film resistor, forming a first opening through the first dielectric layer to expose an underlying portion of the thin film resistor, forming an electrically conductive etch-stop within the first opening of the first dielectric layer, forming a second dielectric layer over the etch-stop and the first dielectric layer, forming a second opening through the second dielectric layer to expose the underlying portion of the etch-stop, and forming a metal plug within the second contact opening, wherein the metal plug is in electrical contact with the thin film resistor by way of the etch-stop.
Another method of forming a thin film resistor contact of the invention comprises the steps of forming a thin film resistor, forming a first dielectric layer over the thin film resistor, forming a first opening through the first dielectric layer to expose an underlying portion of the thin film resistor, forming an electrically conductive etch-stop within the first opening of the first dielectric layer and continuously over another region of the first dielectric layer that does not overlie the thin film resistor, forming a second dielectric layer over the etch-stop and the first dielectric layer, forming a second opening through the second dielectric layer to expose the underlying region of the etch-stop that is not situated over the thin film resistor, and forming a metal plug within the second contact opening, wherein the metal plug is in electrical contact with the thin film resistor by way of the etch-stop.
In the exemplary implementation of the above methods of forming a thin film resistor contact, the electrically conductive etch-stop can be comprised of a combination of titanium and titanium-nitride, or titanium-tungsten and titanium-tungsten-nitride, or other suitable material that is electrically conductive and relatively selective to dry etching processes.
Yet another alternative method of forming a thin film resistor contact of the invention comprises the steps of forming a thin film resistor, forming a first dielectric layer over the thin film resistor, forming a first opening through the first dielectric layer to expose an underlying portion of the thin film resistor, forming an electrically insulating etch-stop within the first opening of the first dielectr

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