Global stride prefetching apparatus and method for a high-perfor

Details Global stride prefetching apparatus and method for a high-perfor Global stride prefetching apparatus and method for a high-perfor

1997-02-03

2000-04-25

Maung, Zarni

Electrical computers and digital processing systems: processing

Instruction fetching

Prefetching

712225, 711169, 711213, 711217, 711218, 711219, G06F 1208

Patent

active

060556226

ABSTRACT:
A method and hardware apparatus for data prefetching. In one embodiment, the method of the present invention comprises first calculating a local stride value by computing the value between two address references of a first load instruction. The local stride value of the first load instruction is used as a global stride value for address prefetching for a second load instruction, where the second load instruction is different from the first load instruction. An appropriate global stride value is added to a previous address value associated with a previous occurrence of the second load instruction, producing an address location for prefetching a block of data.

REFERENCES:
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patent: 5694568 (1997-12-01), Harrison, III et al.
patent: 5752037 (1998-05-01), Gornish et al.
patent: 5761706 (1998-06-01), Kessler et al.
Mehrotra, Sharad, "Quantifying the Performance Potential of a Data Prefetch Mechanism for Pointer-Intensive and Numeric Programs," CSRD and UI Department of Computer Science, (Nov. 7, 1995) pp. 1-34.
Chen, Tien-Fu and Baer, Jean-Loup, "Effective Hardware-Based Data Prefetching for High-Performance Processors", IEEE Transactions on Computers, vol. 44, No. 5 (May 1995) pp. 609-623.

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