Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2006-08-08
2006-08-08
Mai, Son (Department: 2827)
Static information storage and retrieval
Addressing
Sync/clocking
C365S230010, C365S230030, C365S230060
Reexamination Certificate
active
07088638
ABSTRACT:
A global and local read control synchronization method and system are provided for a memory array configured with multiple memory subarrays. Address signals are decoded to activate based thereon subarray select signals and a cumulative subarray select signal. The cumulative subarray select signal goes active whenever a subarray select signal goes active, and therefore, each pulse of the cumulative subarray select signal is synchronous with one pulse of the subarray select signals. Local read control signals for the multiple memory subarrays are obtained employing the subarray select signals, and at least one global read control signal for the memory array is obtained employing the cumulative subarray select signal. In one example, the memory array has a hierarchical bitline architecture.
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Bunce Paul A.
Davis John D.
Dawson James W.
Plass Donald W.
Augspurger, Esq. Lynn L.
Heslin Rothenberg Farley & & Mesiti P.C.
Mai Son
Radigan, Esq. Kevin P.
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