Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Slope control of leading or trailing edge of rectangular or...
Patent
1994-09-27
1996-01-09
Wambach, Margaret Rose
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Slope control of leading or trailing edge of rectangular or...
327108, 327376, 327377, 327380, H03K 512, H03K 1704
Patent
active
054831881
ABSTRACT:
A GTL phased-output driver is provided which employs a pre-driver, a set of phasing elements or delay elements, and a set of output transistors. The pre-driver includes pull up devices, such as PMOS devices, and pull down devices, such as NMOS devices. The PMOS devices of the pre-driver are configured to route output transistor-triggering signals through the phasing elements in one direction whereas the NMOS devices are configured to route output transistor-releasing signals through the phasing devices in an opposite direction. Output transistors of differing sizes are employed. During a pull down operation, controlled by the PMOS pre-driver transistors, the output transistors are triggered sequentially in order from smallest to largest. During a pull up phase, controlled by the NMOS pre-driver transistors, the output transistors are released in a reverse order from largest to smallest. Hence, the largest transistor is triggered first during a pull down phase but is released last during a pull up phase. Within this configuration, improved edge rates and system noise levels are achieved. An edge rate control circuit is also described wherein time delays provided by each of the phasing elements may be varied to thereby vary the triggering times of the output transistors to also vary the edge rate of the output signal. Test circuitry for allowing individual testing of the output transistors is also described.
REFERENCES:
patent: 4150438 (1979-04-01), Dorey et al.
patent: 5109166 (1992-04-01), Coburn et al.
patent: 5170073 (1992-12-01), Hahn et al.
patent: 5343222 (1994-08-01), Saito et al.
patent: 5347177 (1994-09-01), Lipp
patent: 5355391 (1994-10-01), Horowitz et al.
Popescu et al., "The Metaflow Architecture," IEEE Micro, pp. 10-13 and 63-73, Jun. 1991.
Intel Corporation
Wambach Margaret Rose
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