Gigaohm load resistor for BICMOS process

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357 236, 357 43, 357 51, 357 59, H01L 2702, H01L 2968, H01L 2978, H01L 2904

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050478265

ABSTRACT:
An integrated circuit including a high value resistor (17d) is formed by using an amorphous silicon layer. The amorphous silicon layer may also be used to form the second plate (34) of a capacitor (17c) and a fuse (30). In the second embodiment of the invention, the amorphous silicon layer (92) is formed after the formation of the devices to avoid any additional high temperature cycles.

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patent: 4876220 (1989-10-01), Mohsen et al.
patent: 4876668 (1989-10-01), Thakoor et al.
patent: 4903111 (1990-02-01), Takemae et al.

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