Generic modular multiplier using partial reduction

Cryptography – Particular algorithmic function encoding

Reexamination Certificate

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C380S030000, C708S492000, C713S166000

Reexamination Certificate

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07346159

ABSTRACT:
An apparatus multiplies a first and a second binary polynomial X(t) and Y(t) over GF(2), where an irreducible polynomial Mm(t)=tm+am−1tm−1+am−2tm−2tm−2+ . . . +a1t+a0, and where the coefficients aiare equal to either 1 or 0, and m is a field degree. The degree of X(t)<n, and the degree of Y(t)<n, and m≦n. The apparatus includes a digit serial modular multiplier circuit coupled to supply a multiplication result of degree ≧m of a multiplication of the first and second binary polynomials. The digit serial modular multiplier circuit includes a first and second register, each being ≦n bits. A partial product generator circuit multiplies a portion of digit size d of contents of the first register and contents of the second register. The partial product generator is also utilized as part of a reduction operation for at least one generic curve.

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