Generation of analog voltage using self-biased capacitive...

Details Generation of analog voltage using self-biased capacitive... Generation of analog voltage using self-biased capacitive...

2007-01-01

2009-12-01

Patel, Rajnikant B (Department: 2838)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

C323S313000

Reexamination Certificate

active

07626447

ABSTRACT:
Analog voltage drain with reduced current drain is achieved by a a new capacitive-divided feedback architecture. During the operational phase an op amp monitors a capacitively-divided fraction of the output voltage, and drives a current sink or source accordingly; during an initial phase the output is forced to the correct value by a different circuit, while the opamp is connected to self-tune itself in a way which removes DC offset effects.

REFERENCES:
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patent: 2008/0024096 (2008-01-01), Pan
patent: 2008/0157824 (2008-07-01), Pan
International Search Report mailed Jun. 12, 2008, for International Application No. PCT/US2007/089072.
Written Opinion of the International Searching Authority mailed on Jun. 12, 2008, for International Application No. PCT/US2007/089072.

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