Generation of a phase locked loop output signal having...

Details Generation of a phase locked loop output signal having... Generation of a phase locked loop output signal having...

2005-10-04

2005-10-04

Mis, David (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

With reference oscillator or source

C331S00100A, C327S009000, C327S012000, C327S156000, C327S158000, C327S159000

Reexamination Certificate

active

06952138

ABSTRACT:
The present invention helps to mitigate and reduce the amount of interfering signals (e.g. RF leakage) that enter the phase detector of a phase locked loop by acting as a less than perfect sampler. This is accomplished by introducing a time jitter to the signal edges that enter the phase detector input. A phase detector can also be made to act as a less than perfect sampler by intentionally introducing an interfering signal. For example, a small interfering analog signal can be introduced with a different frequency from the reference frequency already present in the PLL. The interfering signal will cause the stable internal signal to vary slightly in time at the rate of the interfering signal frequency. It is this signal variation and jitter introduced on the signal edges entering the phase detector input that induces the phase detector to act as a less than perfect sampler.

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Ulrich L. Rohde: “Nonlinear Effects In Oscillators and Synthesizers (Invited)”, IEEE MTT-S, May 2001, WEID-1, 8:00 AM, Regular Long, 1045.

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