Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system
Reexamination Certificate
2006-11-09
2009-08-25
Shah, Kamini S (Department: 2128)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
C703S014000, C716S030000
Reexamination Certificate
active
07580823
ABSTRACT:
The invention includes a method and a system for generating integrated circuit (IC) simulation information regarding the effect of design and fabrication process decisions. One embodiment includes creating and using a data store of profile-based information comprising metrology signal, structure profile data, process control parameters, and IC simulation attributes. Another embodiment includes creation and use of a simulation data store generated using test gratings that model the geometries of the IC interconnects. The interconnect simulation data store may be used in-line for monitoring electrical and thermal properties of an IC device during fabrication. Other embodiments include methods and systems for generating and using simulation data stores utilizing a metrology simulator and various combinations of a fabrication process simulator, a device simulator, and/or circuit simulator. Information from the simulation data store may be used in-line in-situ during the design or fabrication process steps.
REFERENCES:
patent: 5539652 (1996-07-01), Tegethoff
patent: 5719796 (1998-02-01), Chen
patent: 5754826 (1998-05-01), Gamal et al.
patent: 5923567 (1999-07-01), Simunic et al.
patent: 6197605 (2001-03-01), Simunic et al.
patent: 6317211 (2001-11-01), Ausschnitt et al.
patent: 6433878 (2002-08-01), Niu et al.
patent: 6609086 (2003-08-01), Bao et al.
patent: 6694275 (2004-02-01), Jakadar et al.
patent: 6757645 (2004-06-01), Chang et al.
patent: 6768983 (2004-07-01), Jakatdar et al.
patent: 6968303 (2005-11-01), Wang et al.
patent: 7136796 (2006-11-01), Jakatdar et al.
patent: 2001/0051856 (2001-12-01), Niu et al.
Niu, “An Integrated System of Optical Metrology for Deep Sub-Micron Lithography”, PhD dissertation, UC Berkeley, 1999, pp. 1-139.
Press, W.H., Flannery, B.P, Teukolsky, S.A., Vetterling, W.T. (1986).Numerical Recipes in Fortran: The Art of Scientific Computing. Second Ed., Cambridge University Press, pp. 436-488.
Bao Junwei
Jakatdar Nickhil
Niu Xinhui
Day Herng-Der
Shah Kamini S
Tokyo Electron Limited
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