Generation and measurement of timing delays by digital phase...

Details Generation and measurement of timing delays by digital phase... Generation and measurement of timing delays by digital phase...

2005-10-18

2005-10-18

Callahan, Timothy P. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Having specific delay in producing output waveform

C702S079000, C702S080000

Reexamination Certificate

active

06956422

ABSTRACT:
A circuit and method for generating a delayed event following a trigger pulse occurring at a random time between clock pulses is disclosed. The circuit includes a clock circuit, a voltage converter, an analog-to-digital converter circuit, a memory storage circuit, and a summing circuit. The method includes representing the time between the triggering pulse and a subsequent clock pulse as a voltage, converting the voltage to a stored digital value, and defining a desired delay time by adding a first time determined by counting a predetermined number of clock cycles to a second time determined by converting the stored digital value first to an analog value and then to a time value.

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International Search Report for PCT Application No. PCT/US03/41267, May 13, 2004, 4 pgs.

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