Generating idle codes in switches

Details Generating idle codes in switches Generating idle codes in switches

1993-06-08

1995-07-04

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

370 582, 370 66, 370 68, H04Q 1108

Patent

active

054307180

ABSTRACT:
A circuit switch connected between transmitting and receiving devices includes a switch memory including a number of memory positions for entering of received time slot data from the transmitting devices, a control memory including a number of memory positions for entering read-out addresses for the switch memory, an addressing path from the control memory to the switch memory for a read-out address in the latter, from which read-out of data shall be made towards a receiving device, and a control unit for entering the read-out addresses in the control memory and for receiving information from the devices related to the connect and disconnect of calls. The addressing path from the control memory has an alternative communication path towards the receiving devices, and each memory position in the control memory includes a specific position for an indicator bit containing information with respect to whether read-out of time slot data should be made from the switch memory or from the control memory.

REFERENCES:
patent: 4718062 (1988-01-01), Andersen
patent: 4841522 (1989-06-01), Yamazaki
patent: 4884264 (1989-11-01), Servel et al.
patent: 4941141 (1990-07-01), Hayano

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