Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
Reexamination Certificate
2009-06-19
2011-10-18
Doan, Nghia (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Physical design processing
C716S100000, C716S101000, C716S110000, C716S116000, C341S173000, C341S184000, C341S185000, C341S187000, C707S602000
Reexamination Certificate
active
08042084
ABSTRACT:
A method of determining a factorization permutation for a natural number can include storing a canonical prime factor vector within memory of a system and storing a first basis vector within the memory. The method can include deriving a first count sequence, including a plurality of counts, from the first basis vector, wherein each count of the first count sequence is a child of the first basis vector. For each count of the first count sequence, a second basis vector can be output that is a child of the count, wherein each count of the first count sequence and child second basis vector specifies a factorization permutation of the natural number.
REFERENCES:
patent: 7640528 (2009-12-01), Baeckler
patent: 7797667 (2010-09-01), Baeckler
patent: 2003/0186685 (2003-10-01), Bollano et al.
Kokosinski , On Generation of Permutations Through Decomposition of Symmetric Group Cosets, Institute of Electrical Enginering and Electronics, Poland, Apr. 1990.
Dick Christopher H.
Janneck Jorn W.
Cuenot Kevin T.
Doan Nghia
Xilinx , Inc.
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