Generating and resolving pixel values within a graphics...

Computer graphics processing and selective visual display system – Display driving control circuitry – Adjusting display pixel size or pixels per given area

Reexamination Certificate

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C345S545000, C345S546000, C345S555000, C345S530000

Reexamination Certificate

active

08059144

ABSTRACT:
A graphics processing apparatus2includes graphics processing pipelines8. The graphics processing pipelines8include a programmable hardware stage12, a pipeline memory22and writeback circuitry16. Programmable resolving circuitry18is provided by the programmable hardware stage12within each pipeline and is responsive to one or more graphics program instructions to read pixel values at a first resolution generated within the pipeline memory22by pixel value generating circuitry18provided by the programmable hardware stage12and to perform a resolving operation upon these pixels values so as to generate pixel values at a second resolution. These pixel values at the second resolution are then written back to a frame buffer memory6.

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patent: 2008/0303841 (2008-12-01), Newhall, Jr.
Search Report for UK 0906691.1, dated Aug. 13, 2009.
J.D. Foley et al,Computer Graphic Principles and Practice, Second Edition in C, 1997, pp. 886-891.
F.I. Parke, “Simulation and Expected Performance Analysis of Multiple Processor Z-Buffer Systems” ACM 1980, pp. 48-56.

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