Generating adjustable-delay clock signal for processing...

Details Generating adjustable-delay clock signal for processing... Generating adjustable-delay clock signal for processing...

2007-09-18

2007-09-18

Awad, Amr A. (Department: 2629)

Computer graphics processing and selective visual display system

Plural physical display element control system

Display elements arranged in matrix

C331S025000

Reexamination Certificate

active

10718975

ABSTRACT:
Circuits, devices and methods provide a phase delay and use it to select when an analog color signal is converted to digital. The phase delay is adjustable, which permits choosing a moment in time when conversion results in improved processing. A PLL circuit receives the synchronizing signal of the color signals, and generates phased signals. A phase adjuster generates an adjustable delay signal by mixing in suitable proportions two of the phased signals that are 45 degrees apart. The delay signal is used by an analog to digital converter, to adjust when exactly it is to be sampled.

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