Generating a sampling clock signal in a communication block...

Details Generating a sampling clock signal in a communication block... Generating a sampling clock signal in a communication block...

2007-09-11

2007-09-11

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Addressing

Sync/clocking

C365S233500

Reexamination Certificate

active

11264060

ABSTRACT:
A method generates a sampling clock signal in a communication block of a memory device having a plurality of communication blocks which are distributed in the memory device. The method includes receiving an input clock signal in the communication block, generating, only in response to the input clock signal, a local clock signal having a predetermined phase relationship with respect to the input clock signal, and generating the sampling clock signal based on the local clock signal.

REFERENCES:
patent: 6442644 (2002-08-01), Gustavson et al.
patent: 6675272 (2004-01-01), Ware et al.

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