Generally-diagonal mapping of address space for row/column organ

Details Generally-diagonal mapping of address space for row/column organ Generally-diagonal mapping of address space for row/column organ

1993-09-30

1996-02-06

Robertson, David L.

395427, 39542107, 3954211, G06F 1200

Patent

active

054902649

ABSTRACT:
A method for storing data in a generally-diagonal pattern in blocks of a flash EEPROM array by which the least number of memory cells are affected by a failure of either a row conductor or a column conductor, and apparatus for addressing the flash array to produce such a generally-diagonal storage pattern. The arrangement allows the simplest forms of error detection and correction circuitry to be utilized.

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