General rate N/(N+1) (0, G) code construction for data...

Coded data generation or conversion – Digital code to digital code converters – To or from run length limited codes

Reexamination Certificate

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C341S058000, C341S061000

Reexamination Certificate

active

06204781

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates in general to modulation encoding and decoding for transmission or storage media, such as magnetic recording systems, and, more particularly, to a system employing a general modulation code construction to form run-length limited block codes.
2. Description of the Related Art
Many conventional magnetic recording systems include partial response or peak-detection magnetic recording channels for data detection. Data detection within a digital communication channel is generally based on periodically sampling the amplitude of the transmitted signal. Enhancements to encoding techniques extend the performance of partial response and peak detection systems by allowing more transitions, or high transition density, without degrading data detection.
In a magnetic recording system, data are first encoded with an error correction code, and then modulation encoded with an encoder and a precoder. The modulation encoded data are written to a recording channel of a magnetic recording media, such as disk or tape. When the magnetic recording channel is read by a read-back head, an equalizer equalizes the input signal to a target partial response (PR). The equalized signal may then be applied to a maximum likelihood (ML) sequence detector, also known as a Viterbi detector, to reconstruct the sequence of the modulation encoded data. The reconstructed sequence may then be subject to inverse coding operations, such as unprecoding, modulation decoding, and then error correction decoding.
Modulation codes may be employed to achieve high transition densities within magnetic recording systems. High transition densities permit more frequent timing and gain control updates. More frequent timing and gain control updates, in turn, result in a lower signal to noise ratio (SNR) requirement of an input signal from the magnetic recording channel for a given level of performance. The modulation encoder and precoder include circuitry to provide timing recovery and gain control information as used with the equalizer. Consequently, frequent non-zero or other active information is provided to the recording channel. Active information is desirably provided without degrading the efficacy of the ML sequence detector to correctly detect the sequence for a given PR. The modulation encoder receives a group of N bits and encodes the N bits as a group of M channel symbols with a modulation code such that the group of M channel symbols satisfies given constraints.
Several properties are desirable for a modulation code for a given implementation of a modulation encoder. First, the modulation code should be a block code where no a priori knowledge of bits or other bit group information is required for decoding other than the given group of N bits and M channel symbols. Second, the code should have a high rate, or coding density, of N/M, and, third, the code should have constraints that provide good performance for a given PR. Fourth, the code should be efficiently implemented in a logic circuit, and, fifth, the code should not affect the efficacy of the ML sequence detector.
Run length limited (RLL) block codes may be used for the modulation code, and these RLL block codes may be characterized by the coding density of N/M, where N is an integer that is either a multiple or sub-multiple of eight, and M is an integer greater than N. The constraint that N be a multiple or submultiple of eight results from the outer error correction encoding and decoding operations being performed on a byte-by-byte basis. A block of bits from a recording channel that contains one or more errors has the entire decoded block contaminated. Accordingly, alignment of block boundaries with byte boundaries reduces the number of contaminated bytes.
RLL block codes are also characterized by run length constraints, labeled as (d, G/I, l, r), where d is the minimum number of zeros between ones, G is the maximum number of zeros, between ones, and I is the maximum number of consecutive zeros between ones in odd/even substrings. For high density codes, d=0, while the G constraint is a value that ensures sufficient transitions for the timing recovery and gain control circuits. Depending on the PR, the I constraint (and/or the G constraint) avoids quasi-catastrophic sequences that may reduce the effectiveness of ML sequence detectors. The constraints l and r are related to the G constraint and specify the maximum number of zeros on the left and right endpoints of the RLL block code, respectively.
The I constraint is generally only useful for some PR channels, an example of which is a channel with a partial response transfer function of the form 1-D
2
, also known as a PR
4
channel. However, transfer functions of other PR channels may be preferred. For example, the EPR
4
channel may be employed which is characterized by the PR transfer function of 1+D−D
2
−D
3
. For the EPR
4
channel, the G constraint itself, in conjunction with a 1/(1⊕D
2
) precoder, provides sufficient timing and/or gain control information while limiting the quasi-catastrophic sequences (here, “⊕” is the exclusive-or operation). Magnetic recording systems with PRML magnetic recording channels have employed a popular 8/9 code with constraints (d=0, G=4, I=4), such as is described in U.S. Pat. No. 4,707,681. This lower rate code has been extended to a higher rate of 16/17, disclosed in U.S. Pat. No. 5,604,497. These types of codes yield a high rate but at the expense of degrading the G and I constraints, which become, for example, (d=0, G=12, I=8). Further, rate 16/17 codes have been constructed which are not derived from a lower rate 8/9 code, and this construction is described in, for example, U.S. Pat. No. 5,635,933.
SUMMARY OF THE INVENTION
The present invention relates to encoding or decoding of a dataword having N element values, the dataword divided into left and right substrings that are encoded as a run-length limited (RLL) codeword in accordance with a general rate N/(N+1) (0, G) code construction. The general rate N/(N+1) (0, G) code construction forms a N/(N+1) (0, G) codeword with constraints (d=0, G=(N/4)+1, l=N/8, r=N/8) from the dataword. For the constraints (d=0, G=(N/4)+1, l=N/8, r=N/8) where d is the minimum number of zeros between ones, G is the maximum number of zeros, between ones, and l and r specify the maximum number of zeros on the left and right endpoints of the RLL block code, respectively.
An exemplary embodiment of an encoder encodes a sequence of N-element datawords into a sequence of (N+1)-element codewords for storage or transmission such that the sequence of codewords satisfies a G constraint, wherein the G constraint corresponds to a maximum number of elements having the same value and G being (N/4)+1. Each dataword is stored as left and right substrings, and the invention determines whether each of the left and right substrings contains at least one code violation of either a first or second case. The first case corresponds to a substring having only an end code violation in which the G constraint would be violated by two adjacent codewords having adjacent end code violations; and the second case corresponds to a substring having at least one G constraint violation within the substring. A middle pivot bit is inserted between the left and right substrings. The dataword is then encoded into the codeword by, if at least one of the left and right substrings has a code violation, defining a first pivot bit for the left substring and a first pivot bit for the right substring, each first pivot bit adjacent to the middle pivot bit and the pair of first pivot bits indicating whether code violations exist in the left substring only, the right substring only, or both left and right substrings. If a substring has a code violation, the encoder circuit defines a second pivot bit for the substring, the second pivot bit ind

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