General purpose sequence controller

Communications: electrical – Digital comparator systems

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G06F 300, G06F 906, G06F 1546

Patent

active

040259021

ABSTRACT:
A general purpose sequence controller wherein a schematic electric circuit diagram comprising a ladder network of circuit lines disposed between two vertical bus lines is changeable and simulated by a special purpose control program. A logic operation circuit comprises first and second circuit means for examining an external input signal in accordance with examine commands of logical AND and OR functions, respectively, first and second memory means for temporarily memorizing the examined results of the first and second circuit means, respectively, third memory means for temporarily memorizing the application of the examine command of the logical OR function, and identifying circuit means for identifying the examined results of the logic operations in accordance with the contents of the first, second and third memory means.

REFERENCES:
patent: 3321704 (1967-05-01), Mann
patent: 3351912 (1967-11-01), Collom et al.
patent: 3566364 (1971-02-01), Hauck
patent: 3686639 (1972-08-01), Fletcher
patent: 3701113 (1972-10-01), Chace
patent: 3731280 (1973-05-01), Shevlin
patent: 3753243 (1973-08-01), Ricketts, Jr. et al.
patent: 3827030 (1974-07-01), Seipp
patent: 3832696 (1974-08-01), Nakao
patent: 3833887 (1974-09-01), Shevlin
patent: 3849765 (1974-11-01), Hamano
Allen-Bradley Co. PMC-1750 Programmable Matrix Controller, Publication SD23, Aug. '72 (Previous Publication 4/71).

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