General purpose EOS/ESD protection circuit for bipolar-CMOS and

Details General purpose EOS/ESD protection circuit for bipolar-CMOS and General purpose EOS/ESD protection circuit for bipolar-CMOS and

1996-09-12

1999-06-29

Gaffin, Jeffrey

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

361111, H02H 322

Patent

active

059176890

ABSTRACT:
An apparatus and method for protecting integrated circuits from electrical overstress and eletrostatic discharge is provided. The apparatus includes a primary EOS/ESD protection device and a feedback circuit. The feedback circuit maintain the primary EOS/ESD protection device in an off state during normal operation of the integrated circuit and switches the primary protection device to an state when an EOS/ESD event occurs at a first input pad with respect to a second input pad of the integrated circuit.

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