Gated isolated structure

Details Gated isolated structure Gated isolated structure

1989-01-23

1990-06-26

Lall, Parshotam S.

Boots, shoes, and leggings

364489, 364488, 437 75, 437 74, 357 48, 357 50, G06F 1560, H01L 2978

Patent

active

049377566

ABSTRACT:
The invention relates to a radiation-hardened (R-H) bulk CMOS process which is compatible with DRAM production and a specific gated isolation structure (GIS). The GIS structure consists of a novel oxide-silicon nitride-oxynitride gate insulator and a LPCVD polysilicon gate. A simple but automatically generating process for creating GIS directly from an original non-R-H device is also described. This generating process is fast and can revise any commercial products to a R-H version. The GIS is always shunted to Vss potential of the circuit chip to assure R-H capability. The grounded GIS structure replaces conventional LOCOS field oxide, which suffers from large threshold voltage shift when exposed to irradiation. Radiation resistance of this gated isolation structure (GIS) is suitable for application in radiation-immunity VLSI integrated circuits (.ltoreq.2um design rule).

REFERENCES:
patent: 3655457 (1972-04-01), Duffy et al.
patent: 3731375 (1973-05-01), Agusta et al.
patent: 4456918 (1984-06-01), Beasom
patent: 4495694 (1985-01-01), Beasom
patent: 4599576 (1986-07-01), Yoshida et al.

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