Image analysis – Histogram processing – For setting a threshold
Patent
1987-10-23
1990-02-13
Boudreau, Leo H.
Image analysis
Histogram processing
For setting a threshold
382 27, 382 49, 364200, C06K 936
Patent
active
049013602
ABSTRACT:
A computer architecture 10 for performing iconic and symbolic operations on image data is disclosed. Three levels of processing elements (CAAPP, ICP, GPPA) are disclosed. The processing elements in the lowest level (CAAPP) are provided with a plurality of controllable gates (N, S, E, W, H, V, NW, NE) that are used to selectively connect together processing elements in that level. In such manner, certain algorithms such as the minimum spanning tree algorithm can be efficiently performed.
REFERENCES:
patent: 4215401 (1980-07-01), Holsztynski et al.
patent: 4224600 (1980-09-01), Sellner
patent: 4309691 (1982-01-01), Castleman
patent: 4384273 (1983-05-01), Ackland et al.
patent: 4574394 (1986-03-01), Holsztynski et al.
patent: 4601055 (1986-07-01), Kent
patent: 4622632 (1986-11-01), Tanimoto et al.
patent: 4783738 (1988-11-01), Li et al.
patent: 4809346 (1989-02-01), Shu
patent: 4809347 (1989-02-01), Nash et al.
A. Merigot et al, "Sphinx, A Pyramidal Approach to Parallel Image Processing", 1985 IEEE Computer Society Workshop on Computer Architecture for Pattern Analysis and Image Database Management, Nov. 1985, pp. 107-111.
Payton, "A Symbolic Pixel Array for Representation of Spatial Knowledge", Proceedings of the Third Annual International Phoenix Conference on Computers and Communications, 1984, pp. 11-16.
Reynolds et al, "Hierarchical Knowledge-Directed Object Extraction Using a Combined Region and Line Representation," Proceedings of Image Understanding Workshop, 1984, pp. 195-204.
Levitan et al, "Signal to Symbols: Unblocking the Vision Communications/Control Bottleneck", VSLI Signal Processing, IEEE Press, 1984, pp. 411-420.
Lawton et al, "Iconic to Symbolic Processing Using a Content Addressable Array Parallel Processor," Proceedings of Image Understanding Workshop, Oct. 1984, pp. 316-332.
"Iconic to Symbolic Processing Using a Content Addressable Array Parallel Processor," Proceedings of Image Understanding Workshop (1984), pp. 316-322, by Lawton, Levitan, Weems, Riseman, and Hanson.
"An Expert System for Object Recognition in Natural Scenes", J. H. Kim et al, IEEE Journal 1984, pp. 170-175.
Cantoni et al: "PAPIA: Pyramidal Architectures for Parallel Image Analysis", Proceedings 7th Symposium on Computer Arithmetic, Ubana, Ill., 4-6 Jun. 1985, IEEE (U.S.), pp. 237-242.
R. M. Logheed et al: "Multi-Processor Architectures for Machine Vision and Image Analysis", Proceedings of the 1985 International Conference on Parallel Processing, 20-23 Aug. 1985, IEEE (U.S.), pp. 493-497.
"Signal to Symbols: Unblocking the Vision Communications/Control Bottleneck", Steven P. Levitan, Charles C. Weems and Edward M. Riseman; VLSI Signal Processing; pp. 411-420, Nov. 1984.
Moldovan et al, "Parallel Processing of Iconic to Symbolic Transformation of Images", IEEE Proceedings on Computer Vision and Pattern Recognition, San Francisco, Calif., Jun. 19-25, 1985, pp. 257-264.
Nash James G.
Shu David B.
Boudreau Leo H.
Couso Jose L.
Denson-Low Wanda K.
Duraiswamy V. D.
Hughes Aircraft Company
LandOfFree
Gated architecture for computer vision machine does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Gated architecture for computer vision machine, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Gated architecture for computer vision machine will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1174782