Gate turn-off thyristor having P.sup.+ gate and emitter

Details Gate turn-off thyristor having P.sup.+ gate and emitter Gate turn-off thyristor having P.sup.+ gate and emitter

1984-10-18

1986-09-02

James, Andrew J.

357 91, 357 55, H01L 2974, H01L 2906

Patent

active

046099336

ABSTRACT:
A gate turn-off thyristor including N-type emitter regions (4) formed in part in the surface layer of a P-type base layer (3), and P.sup.+ layer regions (10) of a high impurity concentration formed immediately beneath gate electrodes (8) in the P-type base layer (3) and immediately beneath the periphery of the N-type emitter regions (4), such that the depth of the P.sup.+ layer regions immediately beneath the gate electrodes (8) is selected to be deeper than the N-type emitter regions (4).

REFERENCES:
patent: 4484214 (1984-11-01), Misawa et al.
patent: 4511913 (1985-04-01), Nagano

Affiliated with

Also associated with

Rating

Gate turn-off thyristor having P.sup.+ gate and emitter does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Gate turn-off thyristor having P.sup.+ gate and emitter, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Gate turn-off thyristor having P.sup.+ gate and emitter will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1100206