1989-07-21
1990-04-17
Clawson, Jr., Joseph E.
357 20, 357 86, 357 89, H01L 2974
Patent
active
049185098
ABSTRACT:
The invention relates to a gate turn-off thyristor which includes, per unit cell, a cathode-side emitter strip and two anode-side spaced emitter strips which overlap in position with the edge of the cathode-side emitter strip. In such a GTO thyristor, the maximum disconnectable anode current greatly decreases during turn-off with increasing voltage rise rate, since the electrical fields developing in the non-regenerative transistor region centered underneath the cathode-side emitter strip are too high. Reduction of the field intensity occurring in the non-regenerative transistor region and thus reduction in the decrease of the maximum disconnectable anode current is realized, according to the invention, in that a p-type zone is disposed between the two anode-side emitter strips to dynamically limit the electrical field, with this p-type zone injecting holes to a lesser degree than the adjacent emitter strips and essentially only during turn-off of high currents.
REFERENCES:
patent: 4691223 (1987-09-01), Murakami et al.
Patent Abstracts of Japan, vol. 7, No. 21 (E-155) [1166], Jan. 27th, 1983.
Patent Abstracts of Japan, vol. 8, No. 261 (E-281) [1698], Nov. 30th, 1984.
E. D. Wolley, "Gate Turn-Off in p-n-p-n Devices", IEEE Transactions on Electron Devices, vol. ed.-13, No. 7, Jul., 1966, pp. 590-597.
Berg Hermann
Nowak Wolf-Dieter
Schlangenotto Heinrich
Clawson Jr. Joseph E.
Licentia Patent-Verwaltungs-GmbH
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