Gate-to-electrode connection in a flat panel display

Details Gate-to-electrode connection in a flat panel display Gate-to-electrode connection in a flat panel display

2001-09-05

2004-06-15

Patel, Ashok (Department: 2879)

Electric lamp and discharge devices

With luminescent solid or liquid material

Vacuum-type tube

C313S497000, C313S309000, C313S311000, C313S336000, C445S024000, C445S050000, C345S076000

Reexamination Certificate

active

06750606

ABSTRACT:

TECHNICAL FIELD
The present invention relates generally to field emission displays and more particularly to connection of a gate to an electrode.
BACKGROUND ART
The cathode ray tube (CRT) display has been the predominant display technology for purposes such as home television and computer systems. For many applications, the CRT display has advantages in terms of superior color resolution, high contrast and brightness, wide viewing angles, fast response times, and low manufacturing costs. However, the CRT display also has major drawbacks such as excessive bulk and weight, fragility, high power and voltage requirements, strong electromagnetic emissions, the need for implosion and x-ray protection, undesirable analog device characteristics, and a requirement for an unsupported vacuum envelope that limits screen size.
To address the inherent drawbacks of the CRT display, alternative display technologies have been developed. These technologies generally provide a flat panel display, and include the liquid crystal display (LCD), both passive and active matrix, the electroluminescent display (ELD), the plasma display panel (PDP), the vacuum fluorescent display (VFD) and the field emission display (FED).
The FED offers great promise as an alternative flat panel display technology. Its advantages include low cost of manufacturing as well as the superior optical characteristics generally associated with the CRT display technology. Like the CRT display, the FED is phosphor based and relies on cathodoluminescence as a principle of operation. The FED relies on electric field or voltage induced emissions to excite the phosphors by electron bombardment rather than the temperature induced emissions used in the CRT display. To produce these emissions, the FED has generally used row-and-column addressable cold cathode emitters of which there are a variety of designs, such as point emitters (also called cone, microtip, or “Spindt” emitters), wedge emitters, thin film amorphic diamond emitters, and thin film edge emitters.
Each of the FED emitters is typically a miniature electron gun of micron dimensions. An insulator and a resistor separate the row electrode from a column electrode, and the column electrode is connected to a gate. An opening is formed in the gate, and an emitter cavity is formed in the insulator down to the resistor. The opening is used to deposit the emitter in the emitter cavity so that the tip of the emitter is adjacent the gate. When a sufficient voltage is applied between the emitter, coupled by the resistor to the row electrode, and an adjacent gate, electrons are emitted from the emitter into a low-pressure environment, which is located between a baseplate, upon which the emitters are mounted, and a faceplate having a metal anode surface over color phosphors. The emitted electrons are attracted to the anode cause the phosphors to emit visible light which form picture elements, or pixels, which make up the images on the face of the FED.
In one FED, a column electrode provides voltage to a gate and a row electrode imposes a voltage on an emitter. In the past, extra steps were required to specifically make the connection between the gate and the column electrode. Generally, a passivation layer over the column electrode needed to be masked and etched specifically for the connection and a high-selectivity etch process was required for etching the passivation layer to avoid undesirable etching of the dielectric layer which was also exposed to the etchant.
The large number of steps required to manufacture a baseplate have long been accepted and a method for simplifying the manufacture has long eluded those skilled in the art.
DISCLOSURE OF THE INVENTION
The present invention provides a flat panel display in which a contact is made between a gate and an emitter electrode using the emitter formation steps and a conductive glue used to secure the emitter. This provides a simplified flat panel display baseplate.
The present invention further provides a method of manufacturing a flat panel display in which a connection between a gate and emitter electrode is formed as part of the conductive glue deposition prior to emitter deposition. This simplifies and speeds up the manufacturing of field emission displays.


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patent: 5669801 (1997-09-01), Lee
patent: 5717285 (1998-02-01), Meyer et al.
patent: 5723052 (1998-03-01), Liu
patent: 5895580 (1999-04-01), Liu et al.
patent: 6509686 (2003-01-01), Moradi et al.

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