Gate signal generating circuit, semiconductor evaluation...

Details Gate signal generating circuit, semiconductor evaluation... Gate signal generating circuit, semiconductor evaluation...

2000-09-20

2002-05-21

Tran, Toan (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Rectangular or pulse waveform width control

C327S031000

Reexamination Certificate

active

06392459

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a gate signal generating circuit for generating a gate signal for measuring the width and level of each of continuous pulse signals outputted from a device (such as an integrated circuit), and a semiconductor evaluating apparatus that uses such a gate signal generating circuit.
BACKGROUND OF THE INVENTION
Conventionally, when measuring the width and level of each of continuous pulse signals outputted from a device (such as an integrated circuit)that is the object to be measured (evaluated) by using a semiconductor evaluating apparatus, since the pulse width and the pulse level are constant, the measurement is performed by setting a gate signal corresponding to an arbitrary pulse using a program in a computer.
As integrated circuits are becoming more and more multifunctional day by day, pulse signals outputted from the integrated circuit (IC) tend to have a waveform in which the pulse widths and the pulse levels are random. In order to measure such random widths and levels in the waveform, it is necessary to set a gate signal to a specific pulse to be measured. An external circuit capable of setting the gate signal is provided outside the semiconductor evaluating apparatus when the semiconductor evaluating apparatus does not have the means for setting the gate signal of a specific pulse. Width and level of a specific pulse are measured by using a signal output by this circuit as the gate signal.
A conventional system of measuring the pulse width and the pulse level by setting a gate signal to an arbitrary pulse when the width and level of a pulse outputted from a device to be measured are constant will be described first.
FIG. 8
is a functional block diagram showing a semiconductor evaluating system. In this system, conditions for measurement of voltage, current or the like of the integrated circuit are set and the signal output from the integrated circuit is measured by using the semiconductor evaluating apparatus.
As shown in
FIG. 8
, IC
35
is mounted on a plate
36
. A semiconductor evaluating apparatus
37
sets the measurement conditions such as a DC voltage and a direct current to be applied to the IC
35
and measures the voltage and current outputted from the IC
35
, time of an output pulse, and the like. Cables
38
serve as an interface of an electric signal between the semiconductor evaluating apparatus
37
and the IC
35
.
A computer
39
provides a control over setting of the measurement conditions. These measurement conditions are outputted to the semiconductor evaluating apparatus
37
. In the semiconductor evaluating apparatus
37
, a gate signal generating device
40
for measuring time duration of the pulse is provided and a gate signal is set using the computer
39
. An external gate signal
41
obtained from the outside of the semiconductor evaluating apparatus
37
can be also used as a gate signal. Some semiconductor evaluating apparatuses can input an AC signal, measure an output AC signal, and determine input and output expectation values of a function pattern.
In the conventional semiconductor evaluating system shown in
FIG. 8
, when measuring the width of a pulse outputted from the IC
35
, the internal gate signal generating device
40
which can be controlled using a computer program by the computer
39
is provided.
When measuring the pulse level, output pulse
42
from the IC
35
is converted into a DC voltage by a sample and hold circuit
43
. A DC voltage
44
outputted from the sample and hold circuit
43
is measured as a pulse level by the semiconductor evaluating apparatus
27
. At this time, the sample and hold circuit
43
latches data by the gate signal
45
.
The operation of the semiconductor evaluating system shown in
FIG. 8
will be described below. As shown in
FIG. 9
, in the case of measuring the width of an output pulse
46
of the IC in which the pulse widths are equal to each other like t
1
=t
2
= . . . =t
n÷1
=t
n
=t
n+1
= . . . , since the pulse width is t
1
=t
2
= . . . =t
n−1
=t
n
=t
n+1
= . . . , when an internal gate signal is set using the computer
39
, it is sufficient to set the gate signal at H (high) level with respect to an arbitrary pulse. Any of signals
47
,
48
,
49
,
50
and
51
can be used as a gate signal for measurement.
As shown in
FIG. 10
, in the case of measuring the level of output pulses
52
of the IC in which the pulse levels are v
1
, =v
2
= . . . =v
n−1
=v
n
=v
n+1
= . . . , the output pulse
52
is converted to a DC voltage by the sample and hold circuit
43
and the DC voltage outputted from the sample and hold circuit
43
is measured. The output pulse
52
is converted into a DC voltage at the timing when the gate signal of the sample and hold circuit
43
is changed from H level to L (low) level. In the case of setting the gate signal using the computer
39
, therefore, since the pulse levels are v
1
=v
2
= . . . =v
n−1
=v
n
=v
n+1
= . . . , it is sufficient to change the gate signal from H level to L level at an arbitrary pulse. Any of the signals
53
,
54
,
55
,
56
and
57
can be used as a gate signal for measurement.
In the conventional integrated circuit, the pulse width and pulse level in an output waveform are constant. Consequently, a gate signal is set to an arbitrary pulse as mentioned above, and the pulse width and the pulse level are measured by the semiconductor evaluating apparatus.
In the case of measuring a specific pulse width or pulse level in an output waveform in which the pulse width is not constant (that is, t
1
≠t
2
≠ . . . t
n−1
≠t
n
≠t
n+1
≠ . . . ) and the pulse level is not also constant (that is, v
1
≠v
2
≠ . . . v
n−1
≠v
n
≠v
n+1
≠ . . . ), however, the position of a gate signal has to be set to the specific pulse. A semiconductor evaluating apparatus which does not have the function of setting a gate signal cannot measure a waveform in which the pulse widths and the pulse levels are random.
SUMMARY OF THE INVENTION
It is an object of this invention to provide a gate signal generating circuit capable of setting a gate signal corresponding to a specific pulse and a semiconductor evaluating apparatus using the circuit. It is another object to provide a semiconductor evaluating apparatus such that even if it does not have the function of setting a gate signal, it is possible to measure a waveform in which the pulse widths and the pulse levels are random.
According to one aspect of this invention, an arbitrary Nth pulse in pulses to be measured which are continuously outputted in the order of 1→2→ . . . →(N−1)→N→(N+1)→ . . . (N is an integer) is specified, the gate signal which is at high level during a period from the end of the (N−1)th pulse to the start of the Nth pulse and which is at low level during a period from the end of the Nth pulse to the start of the (N+1)th pulse is generated, and the width of the Nth pulse is measured by using the gate signal.
According to another aspect of this the invention, an arbitrary Nth pulse in pulses to be measured which are outputted in such a manner that the first to the Xth pulses are periodically repeated like 1→2→ . . . →(N−1)→N→(N+1)→ . . . →X→1→2→ . . . (N−1)→N→(N+1) . . . →X→ . . . (N and X are integers) is specified, a gate signal which is at high level during a period from the end of the (N−1)th pulse to the start of the Nth pulse and which is at low level during a period from the end of the Nth pulse to the start of the (N+1)th pulse is generated, and the width of the Nth pulse is measured by using the gate signal.
According to still another aspect of this invention, an arbitrary Nth pulse in pulses to be measured which are continuousl

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