Gate netlist to register transfer level conversion tool

Details Gate netlist to register transfer level conversion tool Gate netlist to register transfer level conversion tool

1996-06-19

1999-02-02

Teska, Kevin J.

Boots, shoes, and leggings

364489, 364490, G06F 1700, G06F 1750

Patent

active

058673954

ABSTRACT:
The present invention discloses a system to reverse-synthesize a gate level netlist definition of an integrated circuit (IC) design to corresponding register transfer level (RTL) definition of the same circuit. The typical process to implement an integrated circuit is to complete the RTL design first, which is then used, to generate gate level netlist definition, and eventually, a layout level design targeted to a particular process technology. The RTL design definitions, being a general description of the circuit, may be ported to different process technologies. However, the gate netlist level design, being a more specific or lower level definition of the circuit, is not easily ported to other integrated circuit design processes. To port a gate netlist level design to another process technology, the gate netlist should be converted, or reverse-synthesized back to a RTL level design. The present invention describes the method and apparatus to reverse-synthesize gate netlist level definitions into RTL definitions by parsing and analyzing the gate netlist level definition, generating an equivalent RTL definition, and verifying correctness of the RTL definition.

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Akhilesh Tyagi "VLSI Design Parsing", IEEE, 1992, pp. 30-34.
Chowdhury et al. "Hierarchical Layout Synthesis of Analogue VLSI Circuits Using An Intelligent Parsing Mechanism," IEEE, 1992, pp. 835-838.
Singh et al "Extracting RTL Models from Transistor Netlists", IEEE; 1995, pp. 11-17.
Fischer et al. "NETHDL: Abstraction Of Schematics To High-Level HDL," IEEE, 1990, pp. 90-96.

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