Gate lines driving circuit and driving method

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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Details

C345S205000, C345S098000

Reexamination Certificate

active

06717566

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a gate line driving circuit and its method, especially to the driving circuit and the method of reducing the number of level shifters needed.
2. Description of the Related Art
Liquid crystal display (LCD) panels need high voltage (at least 30V) signals to change the orientation of the liquid crystal molecules. Nevertheless, conventional logic integrated circuits (IC) are usually fabricated with a low voltage process due to lower costs and faster circuit operation speed. As a result, logic ICs need to be connected to level shifters to pull up the signals generated from the logic IC in order to control the LCD panel.
FIG. 1
is a schematic diagram of a conventional thin-film transistor(TFT) LCD and the gate line control driving circuit. The TFT LCD panel
10
comprises the following parts: (1) pixel of display
12
: for transferring electric signals into optic images using materials with photo electric properties; (2) active components
14
: TFT is usually adopted as the active type switch component; (3) vertical signal lines
16
: for transferring image signals to the display panel; (4) horizontal signal lines: for controlling the on/off state of the switch component, also referred to as gate control lines.
The TFT LCD driving circuit
20
as shown in the left part of
FIG. 1
comprises a gate line control logic circuit
22
and a plurality of level shifters
2401
~
240
N. Each gate control line G_n has a corresponding level shifter
240
n
. Since the gate control logic circuit
22
is fabricated by low voltage IC process, the level shifters
2401
-
240
N are fabricated by high voltage IC process on other IC chips. In IC chips, high voltage circuits need larger areas than low voltage circuits. So, if high voltage circuits can be simplified, the size of IC chips can become smaller and hence the cost can be reduced.
FIG. 2
shows a timing chart of the gate control lines of FIG.
1
. As shown, the driving circuit
20
provides impulses to G_
1
~G_N in a time frame to select G_
1
~G_N one by one.
Note that in the circuit structure of
FIG. 1
, each gate control line must be driven with a level shifter. As the resolution of the TFT LCD increases, the number of the gate control lines is consequently increased, as is the number of the level shifters, hence resulting in the following liabilities:
(1) The size of driving IC chips (consists of a plurality of level shifters) are increased or the number of the driving IC chips is increased, as are the costs of manufacturing a driving IC and the assembly of PCB (printed circuit board);
(2) The increased cost of the driving IC will result in the increased cost of the LCD; and
(3) the level shifters are used only once in each time frame, representing considerable material inefficiency.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a new driving circuit for the gate control lines and a method to efficiently decrease the number of level shifters needed and consequently reduce the cost of LCD manufacture.
In order to achieve the object described, the present invention provides a driving circuit for driving a plurality of gate control lines G_
1
. . . G_N for active matrix display as shown in FIG.
3
. The gate control lines G_
1
. . . G_N are evenly divided into L groups. The driving circuit comprises a gate line control logic circuit, a first level shifter module, a second level shifter module and a multipliexer. The first level shifter module is controlled by the gate line control logic circuit, and scans the driving lines D_
1
. . . D_K in every time slot to drive the driving lines one by one, wherein L*K=N. The second level shifter module is controlled by the gate line control logic circuit, and scans the L groups in every time frame to select the L groups one by one. The multiplexer is used for connecting the driving lines D_
1
. . . D_K to the gate control lines of a selected group, and connecting the gate control lines of unselected groups to a predetermined power line.
Another object of the present invention is to provide a driving method of scanning and driving a plurality of gate control lines G_
1
. . . G_N. The gate control lines are evenly divided into L groups and scanned one by one in a time frame. The method comprises the following steps: (1) scanning K driving lines D_
1
. . . D_K in a time slot to drive the driving lines one by one, wherein L*K=N. (2) scanning the L groups in a time frame to select the L groups one by one and to connect the gate control lines of each selected group to the driving lines D_
1
. . . D_K.
The multiplexer of the present invention may be formed by active transistors, such as TFT. Therefore, the multiplexer can be produced along with the panel, without the trouble of fabricating an extra IC.
The advantage of the present invention is the reduction in level shifter quantity which consequently reduces the manufacturing cost of the LCD.
The other advantage of the present invention is that the multiplexer can be manufactured along with the display panel at no extra cost.


REFERENCES:
patent: 4317115 (1982-02-01), Kawakami et al.
patent: 4770501 (1988-09-01), Tamura et al.
patent: 5684500 (1997-11-01), Morin et al.
patent: 5767832 (1998-06-01), Koyama et al.
patent: 6091390 (2000-07-01), Sim
patent: 6624865 (2003-09-01), Edwards

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