Gate electrode and manufacturing method thereof, and...

Semiconductor device manufacturing: process – Forming schottky junction – Compound semiconductor

Reexamination Certificate

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Details

C438S671000, C438S950000, C257SE21453

Reexamination Certificate

active

11062588

ABSTRACT:
The present invention provides a method of manufacturing a gate electrode in which a fine gate electrode can effectively be manufactured by thickening a resist opening for gate electrodes formed by ordinary electron beam lithography so as to reduce opening dimensions. The method of manufacturing a gate electrode of the present invention includes a step of forming a laminated resist including at least an electron beam resist layer as a lowermost layer on a surface where a gate electrode is to be formed; a step of forming an opening in layer(s) other than the lowermost layer; a step of forming a gate electrode opening on the lowermost layer exposed from the opening; a step of reducing the gate electrode opening selectively; and a step of forming a gate electrode in the gate electrode opening.

REFERENCES:
patent: 6153499 (2000-11-01), Anda et al.
patent: 6503671 (2003-01-01), Nakajima
patent: 61-284969 (1986-12-01), None
patent: 7-193088 (1995-07-01), None
patent: 10-107044 (1998-04-01), None
patent: 11-352692 (1999-12-01), None
patent: 2001-189283 (2001-07-01), None
patent: 460936 (2001-10-01), None

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