Gate driver circuit for high and low side switches with...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver

Reexamination Certificate

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Details

C326S027000, C326S082000, C326S086000

Reexamination Certificate

active

06307409

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a driver circuit for power switches, and more particularly to a driver circuit for power switches including anti-shoot-through protection.
2. Description of the Related Art
MOSFET devices or MOS transistors are used as power switches in many applications. A common application involves using two MOS power transistors stacked in series between two power supply rails as the output stage of a switching regulator. This is conventionally referred to as a “half-bridge” configuration.
FIG. 1
illustrates a pair of serially connected MOS power transistors (or power switches) driven by a driver circuit. An upper switch
2
(a PMOS transistor) and a lower switch
4
(an NMOS transistor) are connected in series between a positive power supply and ground (or a negative power supply). The switch output voltage V
SW
(node
5
) of the power switches may be coupled to an LC filter circuit
11
to generate an output voltage V
OUT
(node
13
) for driving a load
12
, or other high speed power application. A control signal XON on lead
1
controls the on and off state of the two power switches. Generally, the control signal XON has two active states: a first state for turning on lower switch
4
and turning off upper switch
2
and vice versa for the second state. A passive state also exists where both switches are turned off. A driver circuit
6
, including a upper driver device
7
and a lower driver device
8
, is used to drive power switches
2
and
4
in response to control signal XON so that only one power switch is turned on at a time. Here, upper driver device
7
and lower driver device
8
generate gate control signals PGATE and NGATE for controlling upper switch
2
and lower switch
4
, respectively. Because MOS power switches
2
and
4
are typically large devices with large gate capacitance, the power switches are driven by fairly large driver devices in order to turn the power switches on or off quickly. Typically, upper driver device
7
and lower driver device
8
are each implemented as an inverter (e.g., a CMOS inverter) with large devices so as to generate a gate control signal having a sufficient drive voltage.
Because power switches
2
and
4
are both large MOS transistors, it is very important to ensure that both switches are not turned on simultaneously in operation. If both power switches
2
and
4
are turned on at the same time, a low resistance path is created between the two power rails and a “shoot-through” condition results where a large current flows through the two power switches. Shoot-through is undesirable because it wastes power and the large current flow can cause fluctuations in the power supply voltages. In the extreme case, the large current flow in the power switches can cause over-heating, damaging the power switches themselves. Conventional techniques for preventing shoot-through in the power switches (also called primary shoot-through protection) include introducing delays in the gate control signals to prevent turning both switches on simultaneously. As shown in
FIG. 1
, delay circuits
9
and
10
can be included in driver circuit
6
to delay turning on one power switch until the other power switch is turned off. Another conventional shoot-through protection technique involves monitoring the gate voltage of the power switches to determine when the “ON” power switch is turned off. The “OFF” power switch is turned on only after the gate voltage of the “ON” power switch reaches a level indicating that it is sufficiently turned off. Although these techniques are effective in preventing shoot-through in the power switches, they have the disadvantage of introducing undesirable delays in the switching operation. For example, the gate voltage monitor technique can cause a delay while one power switch is being turned off and can also cause a delay when the other power switch is being turned on. These delays are cumulative and can seriously impact the performance of the switching regulator. Also, delay circuits
9
and
10
are typically not scalable so that any changes in the circuit operating voltages or sizes of the power switches would require determination of new delay values.
Furthermore, while the primary shoot-through protection described above can be effective in preventing shoot-through in the MOS power switches themselves, the shoot-through protection techniques described above do not prevent shoot-through in the driver devices. As described above, the driver devices are themselves large devices for providing sufficient drive voltages for the power switches. Therefore, shoot-through current in the driver devices themselves can be large and problematic. Hence, it may also be necessary to eliminate shoot-through in the driver devices as well. This is referred to as secondary shoot-through protection.
Therefore, it is desirable to provide a driver circuit for driving serially connected power switches and including primary and secondary anti-shoot-through protection.
SUMMARY OF THE INVENTION
According to the present invention, a driver circuit for alternately driving a first transistor and a second transistor in response to a switch control signal is provided. The first and second transistors, typically power transistors, are connected in series between a first power supply and a second power supply and generate an output voltage at an output node for driving a load. The driver circuit includes a first driver circuit portion for driving a control terminal of the first transistor in response to the switch control signal. The first driver circuit portion includes a first control path for generating a turn-on signal for turning on the first transistor; a second control path for generating a turn-off signal for turning off the first transistor; and a third control path for generating a holding signal for holding an on or off state of the control terminal of the first transistor. The third control path has a drive capability less than the drive capability of the first control path or the second control path. In operation, the first control path enables the turn-on signal and the third control path enables the hold signal only after the second transistor is turned off. The first control path disables the turn-on signal and the second control path disables the turn-off signal when the control terminal of the first transistor has moved to a respective on or off state. Finally, the holding signal of the third control path holds the on-off state of the control terminal of the first transistor when the turn-on signal or the turn-off signal is disabled.
In another embodiment, the driver circuit may further include a second driver circuit portion for driving a control terminal of the second transistor in response to the switch control signal. The second driver circuit includes a fourth control path for generating a turn-on signal for turning on the second transistor, a fifth control path a fifth control path for generating a turn-off signal for turning off the second transistor; and a sixth control path for generating a holding signal for holding an on or off state of the control terminal of the second transistor. The sixth control path having a drive capability less than a drive capability of the fourth control path or the fifth control path. The second driver circuit portion operation in an analogous manner as the first driver circuit portion.
The driver circuit of the present invention eliminates shoot-through at the first and second transistors which are typically power transistors or power switches. Primary shoot-through in the first and second transistors is eliminated by using an upper and a lower switch lock-out signal. For instance, the first transistor is not turned on until the driver circuit senses that the second transistor is turned off. Moreover, the driver circuit of the present invention provides secondary shoot-through protection in the driver devices driving each of the first transistor or the second transistor by using an upper driver lockout signal and a

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