Gate-coupled ESD protection circuit for high voltage...

Details Gate-coupled ESD protection circuit for high voltage... Gate-coupled ESD protection circuit for high voltage...

2007-09-25

2007-09-25

Jackson, Stephen W. (Department: 2836)

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

Reexamination Certificate

active

10971271

ABSTRACT:
The present disclosure is directed toward electrostatic device protection for semiconductor devices. A circuit for providing electro-static discharge (ESD) protection for a semiconductor circuit may comprise a first circuit coupled to a voltage bus and to the gate of a first transisto, the first circuit comprising a metal-oxide semiconductor (MOS) transistor; and a second circuit coupled to the voltage bus, to ground, and to the gate of the transistor of the first circuit. The MOS transistor of the first circuit may be a PMOS transistor whose source is coupled to the voltage bus, whose drain is coupled to the gate of the first transistor, whose gate is coupled to the second circuit, and whose well is coupled to a floating N-well.

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