Gate controllable lightly doped drain mosfet devices

Details Gate controllable lightly doped drain mosfet devices Gate controllable lightly doped drain mosfet devices

1988-04-25

1989-09-19

Hille, Rolf

357 91, 357 54, 357 59, 357 2314, H01L 2978

Patent

active

048686174

ABSTRACT:
An LDD MOSFET structure in which gate sidewall spacers are formed of polycrystalline silicon and electrically shorted to the gate to extend gate control over the LDD region surface oxide and thereby reduce and control interface charge trapping without increasing substrate currents.

REFERENCES:
patent: 4363696 (1982-12-01), Nagakubo et al.
patent: 4597824 (1986-07-01), Shinada et al.
patent: 4654680 (1987-03-01), Yamazaki
patent: 4746219 (1988-05-01), Holloway et al.
Sai-Halasz et al., "Simple Realization of an Edge-Doped FET," IBM Technical Disclosure Bulletin, vol. 26, No. 6, Nov. 83, 3025-6.
Ting, "Silicide for Contacts and Interconnects," IEDM, 1984, pp. 110-113.

Affiliated with

Also associated with

Rating

Gate controllable lightly doped drain mosfet devices does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Gate controllable lightly doped drain mosfet devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Gate controllable lightly doped drain mosfet devices will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-372279