Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1989-11-16
1991-07-09
Hudspeth, David
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307364, 307480, H03K 19017, H03K 524
Patent
active
050308610
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a gate circuit having MOS transistors.
2. Description of the Related Art
So-called open collector gate circuits are known in bipolar technology. By comparison with otherwise conventional gate circuits, they are distinguished by an uncomplicated electrical design, problem-free design options, and high fan-out (a standard for how many inputs of other components can be connected to one output).
In the field of MOS technology, no correspondingly simple gate circuit is thus far known.
The object of the present, invention is to devise a circuit of this generic type that is integratable, is as simple as possible in structure, and is as versatile in use as possible.
A configuration for switching data signals in multiplex operation is known from IBM Technical Disclosure Bulletin, Vol. 23, No. 10, March 1981, pp. 4394 and 4395. The switching of data signals in that device is controlled individually for each data signal.
Furthermore, "pass-transistor" networks for performing transfer logic functions are known from Electronics International, Vol. 56, Sept. 1983, No. 19, pp. 144-148. Once again, input data signals are controlled by individual control signals in that device.
SUMMARY OF THE INVENTION
The object of the present invention is to devise a circuit of this generic type that is integratable, is as simple as possible in structure, and is as versatile in use as possible.
With the foregoing and other objects in view there is provided, in accordance with the invention, a gate circuit having MOS transistors, comprising means for supplying a first supply potential, means for supplying a second supply potential, means for supplying a transfer potential having a value between the value of the first supply potential and one-half the potential difference between the first supply potential and the second supply potential, means for supplying at least one clock signal, m inputs, a common line, transfer transistors each being connected between a respective one of the m inputs and the common line, the transfer transistors having gates connected to the transfer potential supply means for blocking a given one of the transfer transistors upon application of the first supply potential to the m input connected to the given transfer transistor, a precharging device for precharging the common line, the precharging device being switched to the first supply potential by the at least one clock signal, and a discriminator circuit connected to the common line for detecting the electrical state of the common line, the discriminator circuit having an output forming an output of the gate circuit.
In accordance with another feature of the invention, the precharging device includes a flip-flop having an output to be switched into connection with the common line.
In accordance with a further feature of the invention, the precharging device includes a switching transistor having the same conduction type as the transfer transistors.
In accordance with an added feature of the invention, the precharging device includes a switching transistor having a conduction type opposite to that of the transfer transistors.
In accordance with an additional feature of the invention, the precharging device permits a selective charging of the common line to one of the supply potentials, the transfer potential is a first transfer potential, and the transfer transistors are first transfer transistors, and there are provided means for supplying a second transfer potential, and second transfer transistors having a conduction type opposite to that of the first transfer transistors and having gates, each of the second transfer transistors being connected in parallel with a respective one of the first transfer transistors forming a pair of transfer transistors, the gates of the transfer transistors of one conduction type being connected to the means for supplying the first transfer potential, and the gates of the transfer transistors of the other conduction type being connected to
REFERENCES:
patent: 4468574 (1984-08-01), Engeler et al.
patent: 4590391 (1986-05-01), Valley
IBM Tech. Disclosure Bulletin, vol. 23, #10, Mar. 1981, "Zero Power and Gate", Kraft, W. R.
Electronics, vol. 56, Sep. 1983, No. 19, pp. 144-148.
Hoffmann Kurt
Kowarik Oskar
Kraus Rainer
Greenberg Laurence A.
Hudspeth David
Lerner Herbert L.
Sanders Andrew
Siemens Aktiengesellschaft
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