Gate array with fully wired multiplexer circuits

Details Gate array with fully wired multiplexer circuits Gate array with fully wired multiplexer circuits

1996-07-25

1998-08-18

Hardy, David B.

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

257204, 257206, 326 41, 326 50, 326114, H01L 27105

Patent

active

057961280

ABSTRACT:
A gate array architecture adapted for serial multiplexer-based circuits. In one embodiment, the gate array contains base cells having functional but isolated serial multiplexer circuits therein. In another embodiment, a base cell contains a single serial multiplexer circuit divisible into varying-sized (size corresponding to the number of inputs) derivative serial multiplexer circuits. In either embodiment, the serial multiplexer circuits within the base cell may be formed from P- and N-channel transistors of varying size. The transistor sizes are chosen to optimize the efficiency of serial multiplexer-based circuits.

REFERENCES:
patent: 4616358 (1986-10-01), Rehm et al.
patent: 5055716 (1991-10-01), El Gamel
patent: 5162666 (1992-11-01), Tran
patent: 5164811 (1992-11-01), Tamura
patent: 5187556 (1993-02-01), Nariishi et al.
patent: 5289021 (1994-02-01), El Gamel
patent: 5391943 (1995-02-01), Mahant-Shetti et al.
patent: 5422581 (1995-06-01), Mahant-Shetti et al.
patent: 5581202 (1996-12-01), Yano et al.

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