Gate array system semiconductor integrated circuit device

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – Having specific type of active device

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257208, 257210, H01L 2710

Patent

active

052987744

ABSTRACT:
Disclosed is a semiconductor integrated circuit device of a gate array system making it possible to mount a digital circuit and a high-precision analog circuit on a common substrate. This semiconductor integrated circuit device includes a basic cell array formed by a plurality of NMOS transistors and a plurality of PMOS transistors formed in rows on a semiconductor substrate. The basic cell array includes a plurality of N well regions formed in rows on the semiconductor substrate, P well regions and well terminal regions. The P well regions or N well regions are divided into small regions of the other conductivity type.

REFERENCES:
patent: 4661815 (1987-04-01), Takayama et al.
patent: 4771327 (1988-09-01), Usui
Masuda et al., "A CMOS Analog and Digital Master Slice LSI", Feb. 26, 1987, 1987 IEEE International Solid-State Circuits Conference, pp. 146-147.

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