Gate array structure and process to allow optioning at second me

Details Gate array structure and process to allow optioning at second me Gate array structure and process to allow optioning at second me

1991-04-15

1992-01-28

Hern, Brian E.

Fishing, trapping, and vermin destroying

437 54, 437 56, 437 57, 437245, 357 71, H01L 2170, H01L 2700

Patent

active

050844040

ABSTRACT:
A structure and method for forming a semicustom integrated circuit in which customization can be performed using only a single masking step. Vias in an insulation layer between first and second metal are made larger than first metal lines so that after deposition of second metal, a final patterning etch can remove not only portions of the second metal to leave interconnect lines but can also remove second metal within any exposed vias and additionally remove first metal in order to disconnect selected portions of first metal lines. In order for the final etch step not to remove portions of the substrate, an extra step of planarizing the insulation layer between first and second metal is provided. The large vias provided by the structure and method also allow for shrinking the size of first and second metal lines and thus shrinking the metal line width required by the design rules for the entire semiconductor structure.

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