Gate array large scale integrated circuit device

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G06F 1300

Patent

active

048090298

ABSTRACT:
A gate array LSI includes a basic cell array region on which internal cell arrays are arranged, and a peripheral circuit region, arranged on the periphery of the basic cell array region. The peripheral circuit region includes input/output cell regions, for constructing an input buffer circuit and part of an output buffer circuit, and a general purpose cell array region, for constructing the remaining part of the output buffer circuit. When the output buffer circuit is not constructed, the general purpose cell array region is used for constructing various other desired circuits.

REFERENCES:
patent: 3968478 (1976-07-01), Mensch
patent: 4040035 (1977-08-01), Bennett et al.
patent: 4086626 (1978-04-01), Chung
patent: 4106090 (1978-08-01), Erickson et al.
patent: 4484292 (1984-11-01), Hong

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