Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – Having specific type of active device
Patent
1992-06-22
1994-08-30
Limanek, Robert
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
Having specific type of active device
257207, 257211, H01L 2710, H01L 2348
Patent
active
053430581
ABSTRACT:
A transparent power grid is formed using a first metal layer and a second metal layer in a gate array having defined therein well tie-down regions. The first metal layer includes first power supply busses for supplying operating and reference voltages to the transistors, the first power supply busses extending in a row direction and overlapping the well tie-down region. The second metal layer includes second power supply busses for supplying operating and reference voltages to the transistors, the second power supply busses extending in a column direction and overlapping the well tie-down regions and the first power supply busses. Vias are formed where first and second power supply busses each supplying a same one of the operating voltage and the reference voltage overlap, thereby connecting the first and second power supply busses. Contacts are formed where first and second power supply busses each supplying a different one of the operating voltage and the reference voltage overlap, the contacts connecting the first power supply busses to underlying well tie-down regions. In effect, all of the necessary vias and contacts are placed in locations that in the prior art were all occupied by contacts alone.
REFERENCES:
patent: 4884118 (1989-11-01), Hui et al.
patent: 4989062 (1991-01-01), Takahashi et al.
Limanek Robert
VLSI Technology Inc.
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