Gas laser device

Details Gas laser device Gas laser device

2002-11-21

2004-09-28

Wong, Don (Department: 2828)

Coherent light generators

Particular component circuitry

For driving or controlling laser

C372S038100, C372S038010, C372S038030, C372S038040, C372S038070, C372S055000

Reexamination Certificate

active

06798803

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a gas laser device which controls to make constant a time between the input of an outer trigger and the emission of laser light.
2. Description of the Related Art
As a light source for a reduced projection exposure device (hereinafter referred to as a “stepper”) for production of semiconductor devices, a gas laser device is used, and attention is especially being given to the use of an excimer laser among others.
FIG. 9
is a diagram showing the structure of an excimer laser device
10
.
The excimer laser device
10
is comprised of a laser chamber
11
which has therein discharge electrodes for causing an electric discharge therebetween to excite laser gas so to output laser light, a pulse power source
12
which applies a high frequency voltage to the discharge electrodes, a charger
13
which charges the pulse power source
12
, an output mirror
14
which resonates the laser light, apertures
15
,
16
which determine a shape of the laser light, and a band narrowing module
17
for narrowing a spectral line width of the laser light.
FIG. 10
is a diagram showing an example of a circuit and peripheral components used for the pulse power source
12
. Generally, a magnet compression circuit is used for the pulse power source
12
. A three-stage magnet compression circuit is used for the pulse power source
12
shown in FIG.
10
.
In the pulse power source
12
shown in
FIG. 10
, a charging capacitor C
0
is connected to the charger
13
. An assist coil L
0
, a semiconductor switch SW and a transfer capacitor C
1
are connected in parallel to the charging capacitor C
0
. A saturable reactor SL
1
and a transfer capacitor C
2
are connected in parallel to the transfer capacitor C
1
. A saturable reactor SL
2
and a transfer capacitor C
3
are connected in parallel to the transfer capacitor C
2
. A saturable reactor SL
3
and a peaking capacitor Cp are connected in parallel to the transfer capacitor C
3
. Discharge electrodes
21
are connected in parallel to the peaking capacitor Cp.
Energy instruction value E required for each pulse is input to a voltage instruction value arithmetic section
22
. In the voltage instruction value arithmetic section
22
, charge voltage Vc of the charging capacitor C
0
is calculated according to the energy instruction value E, and charge voltage instruction value V
0
is output to the charger
13
. The charging capacitor C
0
is recharged according to the charge voltage instruction value V
0
.
When a trigger (hereinafter referred to as the “outer trigger”) TR to be output from a stepper is input to the semiconductor switch SW, the semiconductor switch SW is turned on, and electric charges recharged into the charging capacitor C
0
are transferred to the transfer capacitor C
1
. At this time, when a value obtained by integrating a voltage, which is applied to the saturable reactor SL
1
, with respect to time reaches a prescribed level, the saturable reactor SL
1
is magnetically saturated, and inductance rapidly becomes small. Then, the transfer of electric charges from the front-stage transfer capacitor C
1
to the back-stage transfer capacitor C
2
is started. Thus, each saturable reactor SLn functions as the magnetic switch which is turned on by magnetic saturation.
Similarly, electric charges are sequentially transferred from the front-stage transfer capacitor Cn to the back-stage transfer capacitor C
n+1
and finally to the final peaking capacitor Cp by the switching function of the respective saturable reactors SLn. The voltage between the discharge electrodes
21
rises along with a voltage increase of the peaking capacitor Cp, and when the voltage between the discharge electrodes
21
reaches a prescribed value, the laser gas between the discharge electrodes
21
is produced an electrical breakdown, and the electric discharge is started. The laser gas is excited by the electric discharge, and the laser light is emitted.
Because it is configured in such a way that the inductance becomes smaller as the process advances from the front-stage saturable reactor SLn to the back-stage saturable reactor SLn+1, the pulse compression is effected so that the peak value of electric current passing through the circuit of each step increases sequentially, and a span of electrifying time becomes narrow. Therefore, a powerful discharge can be obtained between the discharge electrodes
21
in a short time.
The excimer laser device
10
is controlled as described below.
A semiconductor substrate is placed on a stage on the part of the stepper. The outer trigger TR is output from the stepper side to the excimer laser device
10
so to emit the laser light in synchronization with the operation of the stage. In order to perform exposure to light with high accuracy, the excimer laser device
10
must keep constant time Tt between the input of the outer trigger TR and the emission of the laser light. The time Tt will be referred to as total time Tt below.
The total time Tt includes a total value Td of time Tdn until each saturable reactor SLn turns on and delay time Ts peculiar to an LC circuit of the magnet compression circuit. The respective times Td, Ts are referred to as delay times Td, Ts below. The delay time Ts is normally constant.
The delay time Tdn of the saturable reactor SLn is determined by the designs of a magnetic characteristic, a sectional area, a number of turns, and the like of the saturable reactor SLn. The delay time Tdn of the saturable reactor SLn which has such designs determined depends on a time integral value of the voltage applied to the saturable reactor SLn. Normally, the time integral value of the voltage is constant. Specifically, when the voltage applied to the saturable reactor SLn is low, the time to turn on the saturable reactor becomes long, and when the voltage applied to the saturable reactor SLn is high, the time to turn it on becomes short. As shown in
FIG. 11
, the time integral value of the applied voltage is indicated by an area surrounded by a time axis and a voltage waveform. The time integral value of the voltage will be used as a voltage and time product below. And, the voltage and time products of the respective saturable reactors SLn are assumed to be the voltage and time product of all saturable reactors SL.
The voltage applied to all saturable reactors SL is replaced with a voltage Vc of the charging capacitor C
0
. Therefore, the delay time Td of all saturable reactors SL varies according to a variation in the voltage Vc of the charging capacitor C
0
, and the total time Tt varies. Such variations are referred to as jitter.
Technologies for remedying the jitter problem are disclosed in Japanese Patent Application Laid-Open No. 11-289119 (hereinafter referred to as “Publication 1”) and U.S. Pat. No. 6,016,325 (hereinafter referred to as “Publication 2”). In Publication 1 and Publication 2, time Tc for compensating delay time Td+Ts is determined to make the total time Tt constant. The time Tc will be referred to as the compensation time Tc below.
The voltage Vc of the charging capacitor C
0
is determined by an input charge voltage instruction value V
0
. Therefore, the charge voltage instruction value V
0
and the delay time Td are mutually associated in Publication 1, and according to this associated relationship, the compensation time Tc corresponding to the charge voltage instruction value V
0
is previously determined so that the total time Tt becomes constant. And, when the charge voltage instruction value V
0
is input for each pulse, corresponding compensation time Tc is determined, so that the total time Tt becomes constant.
In Publication 2, not each charge voltage instruction value V
0
but actual voltage Vc of the charging capacitor C
0
is previously associated with the compensation time Tc.
But, the charge voltage instruction value V
0
and the associated relationship of the voltage Vc of the charging capacitor C
0
and the delay time Td are not always constant. For example, this relationship v

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